From 6842d35012668d5dc3846fcbde136326e6e09bb3 Mon Sep 17 00:00:00 2001 From: Dominik Adamski Date: Fri, 16 Sep 2022 04:01:17 -0500 Subject: [PATCH] [OpenMP][OMPIRBuilder] Add support for order(concurrent) to OMPIRBuilder for SIMD directive If 'order(concurrent)' clause is specified, then the iterations of SIMD loop can be executed concurrently. This patch adds support for LLVM IR codegen via OMPIRBuilder for SIMD loop with 'order(concurrent)' clause. The functionality added to OMPIRBuilder is similar to the functionality implemented in 'CodeGenFunction::EmitOMPSimdInit'. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D134046 Signed-off-by: Dominik Adamski --- clang/lib/CodeGen/CGStmtOpenMP.cpp | 13 +- .../OpenMP/irbuilder_safelen_order_concurrent.cpp | 139 +++++++++++++++++++++ llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 5 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 7 +- llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp | 48 ++++++- .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 10 +- 6 files changed, 205 insertions(+), 17 deletions(-) create mode 100644 clang/test/OpenMP/irbuilder_safelen_order_concurrent.cpp diff --git a/clang/lib/CodeGen/CGStmtOpenMP.cpp b/clang/lib/CodeGen/CGStmtOpenMP.cpp index 1ffee9b..d27e2c3 100644 --- a/clang/lib/CodeGen/CGStmtOpenMP.cpp +++ b/clang/lib/CodeGen/CGStmtOpenMP.cpp @@ -2600,8 +2600,9 @@ static void emitOMPSimdRegion(CodeGenFunction &CGF, const OMPLoopDirective &S, static bool isSupportedByOpenMPIRBuilder(const OMPSimdDirective &S) { // Check for unsupported clauses for (OMPClause *C : S.clauses()) { - // Currently only simdlen and safelen clauses are supported - if (!(isa(C) || isa(C))) + // Currently only order, simdlen and safelen clauses are supported + if (!(isa(C) || isa(C) || + isa(C))) return false; } @@ -2660,9 +2661,15 @@ void CodeGenFunction::EmitOMPSimdDirective(const OMPSimdDirective &S) { auto *Val = cast(Len.getScalarVal()); Safelen = Val; } + llvm::omp::OrderKind Order = llvm::omp::OrderKind::OMP_ORDER_unknown; + if (const auto *C = S.getSingleClause()) { + if (C->getKind() == OpenMPOrderClauseKind ::OMPC_ORDER_concurrent) { + Order = llvm::omp::OrderKind::OMP_ORDER_concurrent; + } + } // Add simd metadata to the collapsed loop. Do not generate // another loop for if clause. Support for if clause is done earlier. - OMPBuilder.applySimd(CLI, /*IfCond*/ nullptr, Simdlen, Safelen); + OMPBuilder.applySimd(CLI, /*IfCond*/ nullptr, Order, Simdlen, Safelen); return; } }; diff --git a/clang/test/OpenMP/irbuilder_safelen_order_concurrent.cpp b/clang/test/OpenMP/irbuilder_safelen_order_concurrent.cpp new file mode 100644 index 0000000..35a8d9b --- /dev/null +++ b/clang/test/OpenMP/irbuilder_safelen_order_concurrent.cpp @@ -0,0 +1,139 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals +// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-enable-irbuilder -verify -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s +// expected-no-diagnostics + +struct S { + int a, b; +}; + +struct P { + int a, b; +}; + +// CHECK-LABEL: @_Z6simplePfS_Pi( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8 +// CHECK-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 +// CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4 +// CHECK-NEXT: [[P:%.*]] = alloca %struct.S*, align 8 +// CHECK-NEXT: [[PP:%.*]] = alloca [[STRUCT_P:%.*]], align 4 +// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 +// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4 +// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[J:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[AGG_CAPTURED8:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 +// CHECK-NEXT: [[AGG_CAPTURED9:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4 +// CHECK-NEXT: [[DOTCOUNT_ADDR10:%.*]] = alloca i32, align 4 +// CHECK-NEXT: store float* [[A:%.*]], float** [[A_ADDR]], align 8 +// CHECK-NEXT: store float* [[B:%.*]], float** [[B_ADDR]], align 8 +// CHECK-NEXT: store i32* [[C:%.*]], i32** [[C_ADDR]], align 8 +// CHECK-NEXT: store i32 3, i32* [[I]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 +// CHECK-NEXT: store i32* [[I]], i32** [[TMP0]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[AGG_CAPTURED1]], i32 0, i32 0 +// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 +// CHECK-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 +// CHECK-NEXT: call void @__captured_stmt(i32* [[DOTCOUNT_ADDR]], %struct.anon* [[AGG_CAPTURED]]) +// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, i32* [[DOTCOUNT_ADDR]], align 4 +// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]] +// CHECK: omp_loop.preheader: +// CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]] +// CHECK: omp_loop.header: +// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ] +// CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]] +// CHECK: omp_loop.cond: +// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[DOTCOUNT]] +// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_EXIT:%.*]] +// CHECK: omp_loop.body: +// CHECK-NEXT: call void @__captured_stmt.1(i32* [[I]], i32 [[OMP_LOOP_IV]], %struct.anon.0* [[AGG_CAPTURED1]]), !llvm.access.group [[ACC_GRP3:![0-9]+]] +// CHECK-NEXT: [[TMP3:%.*]] = load float*, float** [[B_ADDR]], align 8, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 +// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[TMP3]], i64 [[IDXPROM]] +// CHECK-NEXT: [[TMP5:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i32 0, i32 0 +// CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[A2]], align 4, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP6]] to float +// CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP5]], [[CONV]] +// CHECK-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[P]], align 8, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP7]], i32 0, i32 0 +// CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[A3]], align 4, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP8]] to float +// CHECK-NEXT: [[ADD5:%.*]] = fadd float [[ADD]], [[CONV4]] +// CHECK-NEXT: [[TMP9:%.*]] = load float*, float** [[A_ADDR]], align 8, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP10]] to i64 +// CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, float* [[TMP9]], i64 [[IDXPROM6]] +// CHECK-NEXT: store float [[ADD5]], float* [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP3]] +// CHECK-NEXT: br label [[OMP_LOOP_INC]] +// CHECK: omp_loop.inc: +// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1 +// CHECK-NEXT: br label [[OMP_LOOP_HEADER]], !llvm.loop [[LOOP4:![0-9]+]] +// CHECK: omp_loop.exit: +// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]] +// CHECK: omp_loop.after: +// CHECK-NEXT: store i32 3, i32* [[J]], align 4 +// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[AGG_CAPTURED8]], i32 0, i32 0 +// CHECK-NEXT: store i32* [[J]], i32** [[TMP11]], align 8 +// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED9]], i32 0, i32 0 +// CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[J]], align 4 +// CHECK-NEXT: store i32 [[TMP13]], i32* [[TMP12]], align 4 +// CHECK-NEXT: call void @__captured_stmt.2(i32* [[DOTCOUNT_ADDR10]], %struct.anon.1* [[AGG_CAPTURED8]]) +// CHECK-NEXT: [[DOTCOUNT11:%.*]] = load i32, i32* [[DOTCOUNT_ADDR10]], align 4 +// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER12:%.*]] +// CHECK: omp_loop.preheader12: +// CHECK-NEXT: br label [[OMP_LOOP_HEADER13:%.*]] +// CHECK: omp_loop.header13: +// CHECK-NEXT: [[OMP_LOOP_IV19:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER12]] ], [ [[OMP_LOOP_NEXT21:%.*]], [[OMP_LOOP_INC16:%.*]] ] +// CHECK-NEXT: br label [[OMP_LOOP_COND14:%.*]] +// CHECK: omp_loop.cond14: +// CHECK-NEXT: [[OMP_LOOP_CMP20:%.*]] = icmp ult i32 [[OMP_LOOP_IV19]], [[DOTCOUNT11]] +// CHECK-NEXT: br i1 [[OMP_LOOP_CMP20]], label [[OMP_LOOP_BODY15:%.*]], label [[OMP_LOOP_EXIT17:%.*]] +// CHECK: omp_loop.body15: +// CHECK-NEXT: call void @__captured_stmt.3(i32* [[J]], i32 [[OMP_LOOP_IV19]], %struct.anon.2* [[AGG_CAPTURED9]]), !llvm.access.group [[ACC_GRP8:![0-9]+]] +// CHECK-NEXT: [[A22:%.*]] = getelementptr inbounds [[STRUCT_P]], %struct.P* [[PP]], i32 0, i32 0 +// CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[A22]], align 4, !llvm.access.group [[ACC_GRP8]] +// CHECK-NEXT: [[TMP15:%.*]] = load i32*, i32** [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP8]] +// CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group [[ACC_GRP8]] +// CHECK-NEXT: [[IDXPROM23:%.*]] = sext i32 [[TMP16]] to i64 +// CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 [[IDXPROM23]] +// CHECK-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX24]], align 4, !llvm.access.group [[ACC_GRP8]] +// CHECK-NEXT: br label [[OMP_LOOP_INC16]] +// CHECK: omp_loop.inc16: +// CHECK-NEXT: [[OMP_LOOP_NEXT21]] = add nuw i32 [[OMP_LOOP_IV19]], 1 +// CHECK-NEXT: br label [[OMP_LOOP_HEADER13]], !llvm.loop [[LOOP9:![0-9]+]] +// CHECK: omp_loop.exit17: +// CHECK-NEXT: br label [[OMP_LOOP_AFTER18:%.*]] +// CHECK: omp_loop.after18: +// CHECK-NEXT: ret void +// +void simple(float *a, float *b, int *c) { + S s, *p; + P pp; +#pragma omp simd safelen(3) order(concurrent) + for (int i = 3; i < 32; i += 5) { + a[i] = b[i] + s.a + p->a; + } + +#pragma omp simd + for (int j = 3; j < 32; j += 5) { + c[j] = pp.a; + } +} +//. +// CHECK: attributes #0 = { mustprogress noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" } +// CHECK: attributes #1 = { noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" } +//. +// CHECK: !0 = !{i32 1, !"wchar_size", i32 4} +// CHECK: !1 = !{i32 7, !"openmp", i32 50} +// CHECK: !3 = distinct !{} +// CHECK: !4 = distinct !{!4, !5, !6, !7} +// CHECK: !5 = !{!"llvm.loop.parallel_accesses", !3} +// CHECK: !6 = !{!"llvm.loop.vectorize.enable", i1 true} +// CHECK: !7 = !{!"llvm.loop.vectorize.width", i32 3} +// CHECK: !8 = distinct !{} +// CHECK: !9 = distinct !{!9, !10, !6} +// CHECK: !10 = !{!"llvm.loop.parallel_accesses", !8} +//. diff --git a/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h b/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h index ba63353e..0c9f0a9 100644 --- a/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h +++ b/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h @@ -619,10 +619,11 @@ public: /// /// \param Loop The loop to simd-ize. /// \param IfCond The value which corresponds to the if clause condition. + /// \param Order The enum to map order clause /// \param Simdlen The Simdlen length to apply to the simd loop. /// \param Safelen The Safelen length to apply to the simd loop. - void applySimd(CanonicalLoopInfo *Loop, Value *IfCond, ConstantInt *Simdlen, - ConstantInt *Safelen); + void applySimd(CanonicalLoopInfo *Loop, Value *IfCond, omp::OrderKind Order, + ConstantInt *Simdlen, ConstantInt *Safelen); /// Generator for '#omp flush' /// diff --git a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp index a6b7744..b0afacb 100644 --- a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp +++ b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp @@ -3006,7 +3006,8 @@ void OpenMPIRBuilder::createIfVersion(CanonicalLoopInfo *CanonicalLoop, } void OpenMPIRBuilder::applySimd(CanonicalLoopInfo *CanonicalLoop, Value *IfCond, - ConstantInt *Simdlen, ConstantInt *Safelen) { + OrderKind Order, ConstantInt *Simdlen, + ConstantInt *Safelen) { LLVMContext &Ctx = Builder.getContext(); Function *F = CanonicalLoop->getFunction(); @@ -3061,7 +3062,9 @@ void OpenMPIRBuilder::applySimd(CanonicalLoopInfo *CanonicalLoop, Value *IfCond, // In presence of finite 'safelen', it may be unsafe to mark all // the memory instructions parallel, because loop-carried // dependences of 'safelen' iterations are possible. - if (Safelen == nullptr) { + // If clause order(concurrent) is specified then the memory instructions + // are marked parallel even if 'safelen' is finite. + if ((Safelen == nullptr) || (Order == OrderKind::OMP_ORDER_concurrent)) { // Add access group metadata to memory-access instructions. MDNode *AccessGroup = MDNode::getDistinct(Ctx, {}); for (BasicBlock *BB : Reachable) diff --git a/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp b/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp index 92a118b..9bfe98a 100644 --- a/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp +++ b/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp @@ -1771,7 +1771,8 @@ TEST_F(OpenMPIRBuilderTest, ApplySimd) { CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32); // Simd-ize the loop. - OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, /* Simdlen */ nullptr, + OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, OrderKind::OMP_ORDER_unknown, + /* Simdlen */ nullptr, /* Safelen */ nullptr); OMPBuilder.finalize(); @@ -1803,7 +1804,7 @@ TEST_F(OpenMPIRBuilderTest, ApplySimdlen) { CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32); // Simd-ize the loop. - OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, + OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, OrderKind::OMP_ORDER_unknown, ConstantInt::get(Type::getInt32Ty(Ctx), 3), /* Safelen */ nullptr); @@ -1831,13 +1832,49 @@ TEST_F(OpenMPIRBuilderTest, ApplySimdlen) { })); } +TEST_F(OpenMPIRBuilderTest, ApplySafelenOrderConcurrent) { + OpenMPIRBuilder OMPBuilder(*M); + + CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32); + + // Simd-ize the loop. + OMPBuilder.applySimd( + CLI, /* IfCond */ nullptr, OrderKind::OMP_ORDER_concurrent, + /* Simdlen */ nullptr, ConstantInt::get(Type::getInt32Ty(Ctx), 3)); + + OMPBuilder.finalize(); + EXPECT_FALSE(verifyModule(*M, &errs())); + + PassBuilder PB; + FunctionAnalysisManager FAM; + PB.registerFunctionAnalyses(FAM); + LoopInfo &LI = FAM.getResult(*F); + + const std::vector &TopLvl = LI.getTopLevelLoops(); + EXPECT_EQ(TopLvl.size(), 1u); + + Loop *L = TopLvl.front(); + // Parallel metadata shoudl be attached because of presence of + // the order(concurrent) OpenMP clause + EXPECT_TRUE(findStringMetadataForLoop(L, "llvm.loop.parallel_accesses")); + EXPECT_TRUE(getBooleanLoopAttribute(L, "llvm.loop.vectorize.enable")); + EXPECT_EQ(getIntLoopAttribute(L, "llvm.loop.vectorize.width"), 3); + + // Check for llvm.access.group metadata attached to the printf + // function in the loop body. + BasicBlock *LoopBody = CLI->getBody(); + EXPECT_TRUE(any_of(*LoopBody, [](Instruction &I) { + return I.getMetadata("llvm.access.group") != nullptr; + })); +} + TEST_F(OpenMPIRBuilderTest, ApplySafelen) { OpenMPIRBuilder OMPBuilder(*M); CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32); // Simd-ize the loop. - OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, + OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, OrderKind::OMP_ORDER_unknown, /* Simdlen */ nullptr, ConstantInt::get(Type::getInt32Ty(Ctx), 3)); @@ -1871,7 +1908,7 @@ TEST_F(OpenMPIRBuilderTest, ApplySimdlenSafelen) { CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32); // Simd-ize the loop. - OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, + OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, OrderKind::OMP_ORDER_unknown, ConstantInt::get(Type::getInt32Ty(Ctx), 2), ConstantInt::get(Type::getInt32Ty(Ctx), 3)); @@ -1916,7 +1953,8 @@ TEST_F(OpenMPIRBuilderTest, ApplySimdLoopIf) { CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32); // Simd-ize the loop with if condition - OMPBuilder.applySimd(CLI, IfCmp, ConstantInt::get(Type::getInt32Ty(Ctx), 3), + OMPBuilder.applySimd(CLI, IfCmp, OrderKind::OMP_ORDER_unknown, + ConstantInt::get(Type::getInt32Ty(Ctx), 3), /* Safelen */ nullptr); OMPBuilder.finalize(); diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp index 4edb879..bd15fc4 100644 --- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp @@ -996,11 +996,11 @@ convertOmpSimdLoop(Operation &opInst, llvm::IRBuilderBase &builder, if (llvm::Optional safelenVar = loop.getSafelen()) safelen = builder.getInt64(safelenVar.value()); - ompBuilder->applySimd(loopInfo, - loop.getIfExpr() - ? moduleTranslation.lookupValue(loop.getIfExpr()) - : nullptr, - simdlen, safelen); + ompBuilder->applySimd( + loopInfo, + loop.getIfExpr() ? moduleTranslation.lookupValue(loop.getIfExpr()) + : nullptr, + llvm::omp::OrderKind::OMP_ORDER_unknown, simdlen, safelen); builder.restoreIP(afterIP); return success(); -- 2.7.4