From 6801793ead4b3e499c4405511d37ae95a11b5eca Mon Sep 17 00:00:00 2001 From: "Kim, HeungJun" Date: Wed, 20 May 2009 22:11:37 +0900 Subject: [PATCH] [S5PC100] add SYSTEM & PWM Timer register in s5pc1xx.h --- include/s5pc1xx.h | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/include/s5pc1xx.h b/include/s5pc1xx.h index e7ef17b..24cbf44 100644 --- a/include/s5pc1xx.h +++ b/include/s5pc1xx.h @@ -1349,6 +1349,73 @@ * : PWM, Watchdog, System timer, RTC */ +/* PWM */ +#define S5P_PWMTIMER_BASE(x) (S5P_PA_PWMTIMER + (x)) + +#define TCFG0_OFFSET 0x0 +#define TCFG1_OFFSET 0x04 +#define TCON_OFFSET 0x08 +#define TCNTB0_OFFSET 0x0c +#define TCMPB0_OFFSET 0x10 +#define TCNTO0_OFFSET 0x14 +#define TCNTB1_OFFSET 0x18 +#define TCMPB1_OFFSET 0x1c +#define TCNTO1_OFFSET 0x20 +#define TCNTB2_OFFSET 0x24 +#define TCMPB2_OFFSET 0x28 +#define TCNTO2_OFFSET 0x2c +#define TCNTB3_OFFSET 0x30 +#define TCNTO3_OFFSET 0x38 +#define TCNTB4_OFFSET 0x3c +#define TCNTO4_OFFSET 0x40 +#define TINT_CSTAT_OFFSET 0x44 + +#define S5P_TCFG0 S5P_PWMTIMER_BASE(TCFG0_OFFSET) +#define S5P_TCFG1 S5P_PWMTIMER_BASE(TCFG1_OFFSET) +#define S5P_TCON S5P_PWMTIMER_BASE(TCON_OFFSET) +#define S5P_TCNTB0 S5P_PWMTIMER_BASE(TCNTB0_OFFSET) +#define S5P_TCMPB0 S5P_PWMTIMER_BASE(TCMPB0_OFFSET) +#define S5P_TCNTO0 S5P_PWMTIMER_BASE(TCNTO0_OFFSET) +#define S5P_TCNTB1 S5P_PWMTIMER_BASE(TCNTB1_OFFSET) +#define S5P_TCMPB1 S5P_PWMTIMER_BASE(TCMPB1_OFFSET) +#define S5P_TCNTO1 S5P_PWMTIMER_BASE(TCNTO1_OFFSET) +#define S5P_TCNTB2 S5P_PWMTIMER_BASE(TCNTB2_OFFSET) +#define S5P_TCMPB2 S5P_PWMTIMER_BASE(TCMPB2_OFFSET) +#define S5P_TCNTO2 S5P_PWMTIMER_BASE(TCNTO2_OFFSET) +#define S5P_TCNTB3 S5P_PWMTIMER_BASE(TCNTB3_OFFSET) +#define S5P_TCNTO3 S5P_PWMTIMER_BASE(TCNTO3_OFFSET) +#define S5P_TCNTB4 S5P_PWMTIMER_BASE(TCNTB4_OFFSET) +#define S5P_TCNTO4 S5P_PWMTIMER_BASE(TCNTO4_OFFSET) +#define S5P_TINT_CSTAT S5P_PWMTIMER_BASE(TINT_CSTAT_OFFSET) + + +/* System Timer */ +#define S5P_SYSTIMER_BASE(x) (S5P_PA_SYSTEM + (x)) + +#define TCFG_OFFSET 0x0 +#define TCON_OFFSET 0x04 +#define TCNTB_OFFSET 0x08 +#define TCNTO_OFFSET 0x0c +#define ICNTB_OFFSET 0x10 +#define ICNTO_OFFSET 0x14 +#define INT_CSTAT_OFFSET 0x18 + +#define S5P_TCFG S5P_SYSTIMER_BASE(TCFG_OFFSET) +#define S5P_TCON S5P_SYSTIMER_BASE(TCON_OFFSET) +#define S5P_TCNTB S5P_SYSTIMER_BASE(TCNTB_OFFSET) +#define S5P_TCNTO S5P_SYSTIMER_BASE(TCNTO_OFFSET) +#define S5P_ICNTB S5P_SYSTIMER_BASE(ICNTB_OFFSET) +#define S5P_ICNTO S5P_SYSTIMER_BASE(ICNTO_OFFSET) +#define S5P_INT_CSTAT S5P_SYSTIMER_BASE(INT_CSTAT_OFFSET) + + +/* Watchdog */ +#define S5P_WATCHDOG_BASE(x) (S5P_PA_WATCHDOG + (x)) + + +/* RTC */ +#define S5P_RTC_BASE(x) (S5P_PA_RTC + (x)) + /* -- 2.7.4