From 66fc5fedb2bedcee72b5279e5a74ceb2d1ec883a Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Tue, 3 May 2022 00:41:20 +0200 Subject: [PATCH] ARM: dts: lan966x: add flexcom I2C nodes Add all I2C nodes of the flexcom IP blocks. The driver supports FIFO, DMA or both combined. But the latter isn't working correctly. Thus, skip the fifo-size property for now. DMA is doing single byte reads in this case. Keep the nodes disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea Tested-by: Horatiu Vultur Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220502224127.2604333-7-michael@walle.cc Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/lan966x.dtsi | 65 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index a61d394..95d58bd 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -120,6 +120,19 @@ #size-cells = <0>; status = "disabled"; }; + + i2c0: i2c@600 { + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; flx1: flexcom@e0044000 { @@ -158,6 +171,19 @@ #size-cells = <0>; status = "disabled"; }; + + i2c1: i2c@600 { + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; trng: rng@e0048000 { @@ -213,6 +239,19 @@ #size-cells = <0>; status = "disabled"; }; + + i2c2: i2c@600 { + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; flx3: flexcom@e0064000 { @@ -251,6 +290,19 @@ #size-cells = <0>; status = "disabled"; }; + + i2c3: i2c@600 { + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; dma0: dma-controller@e0068000 { @@ -308,6 +360,19 @@ #size-cells = <0>; status = "disabled"; }; + + i2c4: i2c@600 { + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; timer0: timer@e008c000 { -- 2.7.4