From 66f332bc1ac04430580a8498ab5537b392f3ea1e Mon Sep 17 00:00:00 2001 From: Freddy Ye Date: Fri, 2 Sep 2022 11:53:43 +0800 Subject: [PATCH] [X86] Add missing key feature for core2 Reviewed By: erichkeane Differential Revision: https://reviews.llvm.org/D133094 --- clang/test/CodeGen/attr-target-mv.c | 5 +++++ llvm/lib/Support/X86TargetParser.cpp | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/clang/test/CodeGen/attr-target-mv.c b/clang/test/CodeGen/attr-target-mv.c index 8ab2f99..07235ea 100644 --- a/clang/test/CodeGen/attr-target-mv.c +++ b/clang/test/CodeGen/attr-target-mv.c @@ -14,6 +14,7 @@ int __attribute__((target("arch=tigerlake"))) foo(void) {return 9;} int __attribute__((target("arch=sapphirerapids"))) foo(void) {return 10;} int __attribute__((target("arch=alderlake"))) foo(void) {return 11;} int __attribute__((target("arch=rocketlake"))) foo(void) {return 12;} +int __attribute__((target("arch=core2"))) foo(void) {return 13;} int __attribute__((target("default"))) foo(void) { return 2; } int bar(void) { @@ -146,6 +147,8 @@ void calls_pr50025c(void) { pr50025c(); } // LINUX: ret i32 11 // LINUX: define{{.*}} i32 @foo.arch_rocketlake() // LINUX: ret i32 12 +// LINUX: define{{.*}} i32 @foo.arch_core2() +// LINUX: ret i32 13 // LINUX: define{{.*}} i32 @foo() // LINUX: ret i32 2 // LINUX: define{{.*}} i32 @bar() @@ -175,6 +178,8 @@ void calls_pr50025c(void) { pr50025c(); } // WINDOWS: ret i32 11 // WINDOWS: define dso_local i32 @foo.arch_rocketlake() // WINDOWS: ret i32 12 +// WINDOWS: define dso_local i32 @foo.arch_core2() +// WINDOWS: ret i32 13 // WINDOWS: define dso_local i32 @foo() // WINDOWS: ret i32 2 // WINDOWS: define dso_local i32 @bar() diff --git a/llvm/lib/Support/X86TargetParser.cpp b/llvm/lib/Support/X86TargetParser.cpp index 2567f3e..bb62102 100644 --- a/llvm/lib/Support/X86TargetParser.cpp +++ b/llvm/lib/Support/X86TargetParser.cpp @@ -321,7 +321,7 @@ constexpr ProcInfo Processors[] = { { {"prescott"}, CK_Prescott, ~0U, FeaturesPrescott }, { {"nocona"}, CK_Nocona, ~0U, FeaturesNocona }, // Core microarchitecture based processors. - { {"core2"}, CK_Core2, ~0U, FeaturesCore2 }, + { {"core2"}, CK_Core2, FEATURE_SSSE3, FeaturesCore2 }, { {"penryn"}, CK_Penryn, ~0U, FeaturesPenryn }, // Atom processors { {"bonnell"}, CK_Bonnell, FEATURE_SSSE3, FeaturesBonnell }, -- 2.7.4