From 66d7cadb7a4362b317764b7bb859ef76bddfe43a Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Mon, 11 Apr 2022 14:58:08 +0300 Subject: [PATCH] arm64: dts: qcom: msm8996: remove snps,dw-pcie compatibles On MSM8996 PCI controller bindings are not compatible with snps,dw-pcie binding. The platform doesn't provide second (global) IRQ, it requires additional glue code. To prevent it from probing against the dw-pcie driver, remove corresponding compatible. Fixes: ed965ef89227 ("arm64: dts: qcom: msm8996: add support to pcie") Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220411115808.1976500-2-dmitry.baryshkov@linaro.org --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index e918038..1a15393 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1580,7 +1580,7 @@ ranges; pcie0: pcie@600000 { - compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; + compatible = "qcom,pcie-msm8996"; status = "disabled"; power-domains = <&gcc PCIE0_GDSC>; bus-range = <0x00 0xff>; @@ -1632,7 +1632,7 @@ }; pcie1: pcie@608000 { - compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; + compatible = "qcom,pcie-msm8996"; power-domains = <&gcc PCIE1_GDSC>; bus-range = <0x00 0xff>; num-lanes = <1>; @@ -1685,7 +1685,7 @@ }; pcie2: pcie@610000 { - compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; + compatible = "qcom,pcie-msm8996"; power-domains = <&gcc PCIE2_GDSC>; bus-range = <0x00 0xff>; num-lanes = <1>; -- 2.7.4