From 65e95828e500cb1b2a5080bbdd8f787d060154ed Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sat, 2 Nov 2013 12:32:53 +0100 Subject: [PATCH] constraints.md (Ts, Tv): New address constrains. * config/i386/constraints.md (Ts, Tv): New address constrains. * config/i386/i386.md (*lea, *_): Use Ts constraint for address_no_seg_operand. * config/i386/sse.md (*avx512pf_gatherpf_mask) (*avx512pf_gatherpf, *avx512pf_scatterpf_mask) (*avx512pf_scatterpf, *avx2_gathersi) (*avx2_gathersi_2, *avx2_gatherdi, *avx2_gatherdi_2) (*avx2_gatherdi_3, *avx2_gatherdi_4) (*avx512f_gathersi, *avx512f_gathersi_2) (*avx512f_gatherdi, *avx512f_gatherdi_2) (*avx512f_scattersi *avx512f_scatterdi): Use Tv constraint for vsib_address_operand. From-SVN: r204317 --- gcc/ChangeLog | 15 +++++++++++++++ gcc/config/i386/constraints.md | 10 ++++++++++ gcc/config/i386/i386.md | 4 ++-- gcc/config/i386/predicates.md | 8 ++++---- gcc/config/i386/sse.md | 32 ++++++++++++++++---------------- 5 files changed, 47 insertions(+), 22 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 52b0aab..2399a61 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2013-11-02 Uros Bizjak + + * config/i386/constraints.md (Ts, Tv): New address constrains. + * config/i386/i386.md (*lea, *_): Use Ts + constraint for address_no_seg_operand. + * config/i386/sse.md (*avx512pf_gatherpf_mask) + (*avx512pf_gatherpf, *avx512pf_scatterpf_mask) + (*avx512pf_scatterpf, *avx2_gathersi) + (*avx2_gathersi_2, *avx2_gatherdi, *avx2_gatherdi_2) + (*avx2_gatherdi_3, *avx2_gatherdi_4) + (*avx512f_gathersi, *avx512f_gathersi_2) + (*avx512f_gatherdi, *avx512f_gatherdi_2) + (*avx512f_scattersi *avx512f_scatterdi): Use Tv + constraint for vsib_address_operand. + 2013-11-02 Steven Bosscher * gcse.c (pre_delete): Remove references to regmove from comments. diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index ddfd402..7289ae4 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -237,9 +237,19 @@ (match_operand 0 "x86_64_zext_immediate_operand")) ;; T prefix is used for different address constraints +;; v - VSIB address +;; s - address with no segment register ;; i - address with no index and no rip ;; b - address with no base and no rip +(define_address_constraint "Tv" + "VSIB address operand" + (match_operand 0 "vsib_address_operand")) + +(define_address_constraint "Ts" + "Address operand without segment register" + (match_operand 0 "address_no_seg_operand")) + (define_address_constraint "Ti" "MPX address operand without index" (match_operand 0 "address_mpx_no_index_operand")) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 383bb97..c7ec0c1 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5394,7 +5394,7 @@ (define_insn_and_split "*lea" [(set (match_operand:SWI48 0 "register_operand" "=r") - (match_operand:SWI48 1 "address_no_seg_operand" "p"))] + (match_operand:SWI48 1 "address_no_seg_operand" "Ts"))] "" { if (SImode_address_operand (operands[1], VOIDmode)) @@ -18297,7 +18297,7 @@ (define_insn "*_" [(parallel [(unspec [(match_operand:BND 0 "register_operand" "B") - (match_operand: 1 "address_no_seg_operand" "p")] BNDCHECK) + (match_operand: 1 "address_no_seg_operand" "Ts")] BNDCHECK) (set (match_operand:BLK 2 "bnd_mem_operator") (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])] "TARGET_MPX" diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 6ecb871..e5dd90c 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -912,6 +912,10 @@ (ior (match_operand 0 "register_operand") (match_operand 0 "const0_operand"))) +;; Return true for RTX codes that force SImode address. +(define_predicate "SImode_address_operand" + (match_code "subreg,zero_extend,and")) + ;; Return true if op if a valid address for LEA, and does not contain ;; a segment override. Defined as a special predicate to allow ;; mode-less const_int operands pass to address_operand. @@ -926,10 +930,6 @@ return parts.seg == SEG_DEFAULT; }) -;; Return true for RTX codes that force SImode address. -(define_predicate "SImode_address_operand" - (match_code "subreg,zero_extend,and")) - ;; Return true if op if a valid base register, displacement or ;; sum of base register and displacement for VSIB addressing. (define_predicate "vsib_address_operand" diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 9094a1c..7bb2d77 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -11462,7 +11462,7 @@ [(match_operand: 0 "register_operand" "k") (match_operator: 5 "vsib_mem_operator" [(unspec:P - [(match_operand:P 2 "vsib_address_operand" "p") + [(match_operand:P 2 "vsib_address_operand" "Tv") (match_operand:VI48_512 1 "register_operand" "v") (match_operand:SI 3 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -11489,7 +11489,7 @@ [(const_int -1) (match_operator: 4 "vsib_mem_operator" [(unspec:P - [(match_operand:P 1 "vsib_address_operand" "p") + [(match_operand:P 1 "vsib_address_operand" "Tv") (match_operand:VI48_512 0 "register_operand" "v") (match_operand:SI 2 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -11533,7 +11533,7 @@ [(match_operand: 0 "register_operand" "k") (match_operator: 5 "vsib_mem_operator" [(unspec:P - [(match_operand:P 2 "vsib_address_operand" "p") + [(match_operand:P 2 "vsib_address_operand" "Tv") (match_operand:VI48_512 1 "register_operand" "v") (match_operand:SI 3 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -11560,7 +11560,7 @@ [(const_int -1) (match_operator: 4 "vsib_mem_operator" [(unspec:P - [(match_operand:P 1 "vsib_address_operand" "p") + [(match_operand:P 1 "vsib_address_operand" "Tv") (match_operand:VI48_512 0 "register_operand" "v") (match_operand:SI 2 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13650,7 +13650,7 @@ [(match_operand:VEC_GATHER_MODE 2 "register_operand" "0") (match_operator: 7 "vsib_mem_operator" [(unspec:P - [(match_operand:P 3 "vsib_address_operand" "p") + [(match_operand:P 3 "vsib_address_operand" "Tv") (match_operand: 4 "register_operand" "x") (match_operand:SI 6 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13670,7 +13670,7 @@ [(pc) (match_operator: 6 "vsib_mem_operator" [(unspec:P - [(match_operand:P 2 "vsib_address_operand" "p") + [(match_operand:P 2 "vsib_address_operand" "Tv") (match_operand: 3 "register_operand" "x") (match_operand:SI 5 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13712,7 +13712,7 @@ [(match_operand: 2 "register_operand" "0") (match_operator: 7 "vsib_mem_operator" [(unspec:P - [(match_operand:P 3 "vsib_address_operand" "p") + [(match_operand:P 3 "vsib_address_operand" "Tv") (match_operand: 4 "register_operand" "x") (match_operand:SI 6 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13732,7 +13732,7 @@ [(pc) (match_operator: 6 "vsib_mem_operator" [(unspec:P - [(match_operand:P 2 "vsib_address_operand" "p") + [(match_operand:P 2 "vsib_address_operand" "Tv") (match_operand: 3 "register_operand" "x") (match_operand:SI 5 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13757,7 +13757,7 @@ [(match_operand: 2 "register_operand" "0") (match_operator: 7 "vsib_mem_operator" [(unspec:P - [(match_operand:P 3 "vsib_address_operand" "p") + [(match_operand:P 3 "vsib_address_operand" "Tv") (match_operand: 4 "register_operand" "x") (match_operand:SI 6 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13780,7 +13780,7 @@ [(pc) (match_operator: 6 "vsib_mem_operator" [(unspec:P - [(match_operand:P 2 "vsib_address_operand" "p") + [(match_operand:P 2 "vsib_address_operand" "Tv") (match_operand: 3 "register_operand" "x") (match_operand:SI 5 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13822,7 +13822,7 @@ (match_operand: 7 "register_operand" "2") (match_operator: 6 "vsib_mem_operator" [(unspec:P - [(match_operand:P 4 "vsib_address_operand" "p") + [(match_operand:P 4 "vsib_address_operand" "Tv") (match_operand: 3 "register_operand" "v") (match_operand:SI 5 "const1248_operand" "n")] UNSPEC_VSIBADDR)])] @@ -13841,7 +13841,7 @@ (match_operand: 6 "register_operand" "1") (match_operator: 5 "vsib_mem_operator" [(unspec:P - [(match_operand:P 3 "vsib_address_operand" "p") + [(match_operand:P 3 "vsib_address_operand" "Tv") (match_operand: 2 "register_operand" "v") (match_operand:SI 4 "const1248_operand" "n")] UNSPEC_VSIBADDR)])] @@ -13880,7 +13880,7 @@ (match_operand:QI 7 "register_operand" "2") (match_operator: 6 "vsib_mem_operator" [(unspec:P - [(match_operand:P 4 "vsib_address_operand" "p") + [(match_operand:P 4 "vsib_address_operand" "Tv") (match_operand: 3 "register_operand" "v") (match_operand:SI 5 "const1248_operand" "n")] UNSPEC_VSIBADDR)])] @@ -13899,7 +13899,7 @@ (match_operand:QI 6 "register_operand" "1") (match_operator: 5 "vsib_mem_operator" [(unspec:P - [(match_operand:P 3 "vsib_address_operand" "p") + [(match_operand:P 3 "vsib_address_operand" "Tv") (match_operand: 2 "register_operand" "v") (match_operand:SI 4 "const1248_operand" "n")] UNSPEC_VSIBADDR)])] @@ -13936,7 +13936,7 @@ (define_insn "*avx512f_scattersi" [(set (match_operator:VI48F_512 5 "vsib_mem_operator" [(unspec:P - [(match_operand:P 0 "vsib_address_operand" "p") + [(match_operand:P 0 "vsib_address_operand" "Tv") (match_operand: 2 "register_operand" "v") (match_operand:SI 4 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) @@ -13972,7 +13972,7 @@ (define_insn "*avx512f_scatterdi" [(set (match_operator:VI48F_512 5 "vsib_mem_operator" [(unspec:P - [(match_operand:P 0 "vsib_address_operand" "p") + [(match_operand:P 0 "vsib_address_operand" "Tv") (match_operand:V8DI 2 "register_operand" "v") (match_operand:SI 4 "const1248_operand" "n")] UNSPEC_VSIBADDR)]) -- 2.7.4