From 65bc25b8d0904e0aff66b1c3a9dd4c0dcb8efbf1 Mon Sep 17 00:00:00 2001 From: Matus Gajdos Date: Wed, 19 Jul 2023 18:31:53 +0200 Subject: [PATCH] ASoC: fsl_spdif: Add support for 22.05 kHz sample rate Add support for 22.05 kHz sample rate for TX. Signed-off-by: Matus Gajdos Reviewed-by: Fabio Estevam Link: https://lore.kernel.org/r/20230719163154.19492-1-matuszpd@gmail.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl_spdif.c | 8 ++++++-- sound/soc/fsl/fsl_spdif.h | 6 ++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 015c370..95e6397 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -514,6 +514,10 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, int ret; switch (sample_rate) { + case 22050: + rate = SPDIF_TXRATE_22050; + csfs = IEC958_AES3_CON_FS_22050; + break; case 32000: rate = SPDIF_TXRATE_32000; csfs = IEC958_AES3_CON_FS_32000; @@ -1422,7 +1426,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv, struct clk *clk, u64 savesub, enum spdif_txrate index, bool round) { - static const u32 rate[] = { 32000, 44100, 48000, 88200, 96000, 176400, + static const u32 rate[] = { 22050, 32000, 44100, 48000, 88200, 96000, 176400, 192000, }; bool is_sysclk = clk_is_match(clk, spdif_priv->sysclk); u64 rate_ideal, rate_actual, sub; @@ -1483,7 +1487,7 @@ out: static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv, enum spdif_txrate index) { - static const u32 rate[] = { 32000, 44100, 48000, 88200, 96000, 176400, + static const u32 rate[] = { 22050, 32000, 44100, 48000, 88200, 96000, 176400, 192000, }; struct platform_device *pdev = spdif_priv->pdev; struct device *dev = &pdev->dev; diff --git a/sound/soc/fsl/fsl_spdif.h b/sound/soc/fsl/fsl_spdif.h index 75b42a6..2bc1b10 100644 --- a/sound/soc/fsl/fsl_spdif.h +++ b/sound/soc/fsl/fsl_spdif.h @@ -175,7 +175,8 @@ enum spdif_gainsel { /* SPDIF tx rate */ enum spdif_txrate { - SPDIF_TXRATE_32000 = 0, + SPDIF_TXRATE_22050 = 0, + SPDIF_TXRATE_32000, SPDIF_TXRATE_44100, SPDIF_TXRATE_48000, SPDIF_TXRATE_88200, @@ -191,7 +192,8 @@ enum spdif_txrate { #define SPDIF_QSUB_SIZE (SPDIF_UBITS_SIZE / 8) -#define FSL_SPDIF_RATES_PLAYBACK (SNDRV_PCM_RATE_32000 | \ +#define FSL_SPDIF_RATES_PLAYBACK (SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_32000 | \ SNDRV_PCM_RATE_44100 | \ SNDRV_PCM_RATE_48000 | \ SNDRV_PCM_RATE_88200 | \ -- 2.7.4