From 6515b203702b01cd7d4ef8f9cbad77474fc2ed42 Mon Sep 17 00:00:00 2001 From: bellard Date: Wed, 3 May 2006 22:02:44 +0000 Subject: [PATCH] ACPI support git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1902 c046a42c-6fe2-441c-8c8c-71466251a162 --- Makefile.target | 7 +- hw/acpi-dsdt.dsl | 432 +++++++++++++++++++++++++++++++++++++++ hw/acpi-dsdt.hex | 222 ++++++++++++++++++++ hw/acpi.c | 609 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/pc.c | 5 + vl.c | 8 + vl.h | 5 + 7 files changed, 1287 insertions(+), 1 deletion(-) create mode 100644 hw/acpi-dsdt.dsl create mode 100644 hw/acpi-dsdt.hex create mode 100644 hw/acpi.c diff --git a/Makefile.target b/Makefile.target index aff19c5..f25153b 100644 --- a/Makefile.target +++ b/Makefile.target @@ -316,7 +316,7 @@ ifeq ($(TARGET_BASE_ARCH), i386) # Hardware support VL_OBJS+= ide.o pckbd.o ps2.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o -VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o +VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o acpi.o DEFINES += -DHAS_AUDIO endif ifeq ($(TARGET_BASE_ARCH), ppc) @@ -471,6 +471,11 @@ endif loader.o: loader.c elf_ops.h +acpi.o: acpi.c acpi-dsdt.hex + +#$(SRC_PATH)/hw/acpi-dsdt.hex: acpi-dsdt.dsl +# iasl -tc -p $@ $< + ifeq ($(TARGET_ARCH), sh4) op.o: op.c op_mem.c cpu.h op_helper.o: op_helper.c exec.h cpu.h diff --git a/hw/acpi-dsdt.dsl b/hw/acpi-dsdt.dsl new file mode 100644 index 0000000..b94df01 --- /dev/null +++ b/hw/acpi-dsdt.dsl @@ -0,0 +1,432 @@ +/* + * QEMU ACPI DSDT ASL definition + * + * Copyright (c) 2006 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License version 2 as published by the Free Software Foundation. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +DefinitionBlock ( + "acpi-dsdt.aml", // Output Filename + "DSDT", // Signature + 0x01, // DSDT Compliance Revision + "QEMU", // OEMID + "QEMUDSDT", // TABLE ID + 0x1 // OEM Revision + ) +{ + Scope (\) + { + /* CMOS memory access */ + OperationRegion (CMS, SystemIO, 0x70, 0x02) + Field (CMS, ByteAcc, NoLock, Preserve) + { + CMSI, 8, + CMSD, 8 + } + Method (CMRD, 1, NotSerialized) + { + Store (Arg0, CMSI) + Store (CMSD, Local0) + Return (Local0) + } + + /* Debug Output */ + OperationRegion (DBG, SystemIO, 0xb044, 0x04) + Field (DBG, DWordAcc, NoLock, Preserve) + { + DBGL, 32, + } + } + + + /* PCI Bus definition */ + Scope(\_SB) { + Device(PCI0) { + Name (_HID, EisaId ("PNP0A03")) + Name (_ADR, 0x00) + Name (_UID, 1) + Name(_PRT, Package() { + /* PCI IRQ routing table, example from ACPI 2.0a specification, + section 6.2.8.1 */ + /* Note: we provide the same info as the PCI routing + table of the Bochs BIOS */ + + // PCI Slot 0 + Package() {0x0000ffff, 0, LNKA, 0}, + Package() {0x0000ffff, 1, LNKB, 0}, + Package() {0x0000ffff, 2, LNKC, 0}, + Package() {0x0000ffff, 3, LNKD, 0}, + + // PCI Slot 1 + Package() {0x0001ffff, 0, LNKB, 0}, + Package() {0x0001ffff, 1, LNKC, 0}, + Package() {0x0001ffff, 2, LNKD, 0}, + Package() {0x0001ffff, 3, LNKA, 0}, + + // PCI Slot 2 + Package() {0x0002ffff, 0, LNKC, 0}, + Package() {0x0002ffff, 1, LNKD, 0}, + Package() {0x0002ffff, 2, LNKA, 0}, + Package() {0x0002ffff, 3, LNKB, 0}, + + // PCI Slot 3 + Package() {0x0003ffff, 0, LNKD, 0}, + Package() {0x0003ffff, 1, LNKA, 0}, + Package() {0x0003ffff, 2, LNKB, 0}, + Package() {0x0003ffff, 3, LNKC, 0}, + + // PCI Slot 4 + Package() {0x0004ffff, 0, LNKA, 0}, + Package() {0x0004ffff, 1, LNKB, 0}, + Package() {0x0004ffff, 2, LNKC, 0}, + Package() {0x0004ffff, 3, LNKD, 0}, + + // PCI Slot 5 + Package() {0x0005ffff, 0, LNKB, 0}, + Package() {0x0005ffff, 1, LNKC, 0}, + Package() {0x0005ffff, 2, LNKD, 0}, + Package() {0x0005ffff, 3, LNKA, 0}, + }) + + Method (_CRS, 0, NotSerialized) + { + Name (MEMP, ResourceTemplate () + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Address Space Granularity + 0x0000, // Address Range Minimum + 0x00FF, // Address Range Maximum + 0x0000, // Address Translation Offset + 0x0100, // Address Length + ,, ) + IO (Decode16, + 0x0CF8, // Address Range Minimum + 0x0CF8, // Address Range Maximum + 0x01, // Address Alignment + 0x08, // Address Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Address Space Granularity + 0x0000, // Address Range Minimum + 0x0CF7, // Address Range Maximum + 0x0000, // Address Translation Offset + 0x0CF8, // Address Length + ,, , TypeStatic) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Address Space Granularity + 0x0D00, // Address Range Minimum + 0xFFFF, // Address Range Maximum + 0x0000, // Address Translation Offset + 0xF300, // Address Length + ,, , TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x000A0000, // Address Range Minimum + 0x000BFFFF, // Address Range Maximum + 0x00000000, // Address Translation Offset + 0x00020000, // Address Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinNotFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x00000000, // Address Range Minimum + 0xFEBFFFFF, // Address Range Maximum + 0x00000000, // Address Translation Offset + 0x00000000, // Address Length + ,, MEMF, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MEMP, \_SB.PCI0._CRS.MEMF._MIN, PMIN) + CreateDWordField (MEMP, \_SB.PCI0._CRS.MEMF._MAX, PMAX) + CreateDWordField (MEMP, \_SB.PCI0._CRS.MEMF._LEN, PLEN) + /* compute available RAM */ + Add(CMRD(0x34), ShiftLeft(CMRD(0x35), 8), Local0) + ShiftLeft(Local0, 16, Local0) + Add(Local0, 0x1000000, Local0) + /* update field of last region */ + Store(Local0, PMIN) + Subtract (PMAX, PMIN, PLEN) + Increment (PLEN) + Return (MEMP) + } + } + } + + /* PIIX3 ISA bridge */ + Scope(\_SB.PCI0) { + Device (ISA) { + Name (_ADR, 0x00010000) + + /* PIIX PCI to ISA irq remapping */ + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + + + /* Keyboard seems to be important for WinXP install */ + Device (KBD) + { + Name (_HID, EisaId ("PNP0303")) + Method (_STA, 0, NotSerialized) + { + Return (0x0f) + } + + Method (_CRS, 0, NotSerialized) + { + Name (TMP, ResourceTemplate () + { + IO (Decode16, + 0x0060, // Address Range Minimum + 0x0060, // Address Range Maximum + 0x01, // Address Alignment + 0x01, // Address Length + ) + IO (Decode16, + 0x0064, // Address Range Minimum + 0x0064, // Address Range Maximum + 0x01, // Address Alignment + 0x01, // Address Length + ) + IRQNoFlags () + {1} + }) + Return (TMP) + } + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13")) + Method (_STA, 0, NotSerialized) + { + Return (0x0f) + } + + Method (_CRS, 0, NotSerialized) + { + Name (TMP, ResourceTemplate () + { + IRQNoFlags () {12} + }) + Return (TMP) + } + } + } + } + + /* PCI IRQs */ + Scope(\_SB) { + Field (\_SB.PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Device(LNKA){ + Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link + Name(_UID, 1) + Name(_PRS, ResourceTemplate(){ + IRQ (Level, ActiveLow, Shared) + {3,4,5,6,7,9,10,11,12} + }) + Method (_STA, 0, NotSerialized) + { + Store (0x0B, Local0) + If (And (0x80, PRQ0, Local1)) + { + Store (0x09, Local0) + } + Return (Local0) + } + Method (_DIS, 0, NotSerialized) + { + Or (PRQ0, 0x80, PRQ0) + } + Method (_CRS, 0, NotSerialized) + { + Name (PRR0, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) + {1} + }) + CreateWordField (PRR0, 0x01, TMP) + Store (PRQ0, Local0) + If (LLess (Local0, 0x80)) + { + ShiftLeft (One, Local0, TMP) + } + Else + { + Store (Zero, TMP) + } + Return (PRR0) + } + Method (_SRS, 1, NotSerialized) + { + CreateWordField (Arg0, 0x01, TMP) + FindSetRightBit (TMP, Local0) + Decrement (Local0) + Store (Local0, PRQ0) + } + } + Device(LNKB){ + Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link + Name(_UID, 2) + Name(_PRS, ResourceTemplate(){ + IRQ (Level, ActiveLow, Shared) + {3,4,5,6,7,9,10,11,12} + }) + Method (_STA, 0, NotSerialized) + { + Store (0x0B, Local0) + If (And (0x80, PRQ1, Local1)) + { + Store (0x09, Local0) + } + Return (Local0) + } + Method (_DIS, 0, NotSerialized) + { + Or (PRQ1, 0x80, PRQ1) + } + Method (_CRS, 0, NotSerialized) + { + Name (PRR0, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) + {1} + }) + CreateWordField (PRR0, 0x01, TMP) + Store (PRQ1, Local0) + If (LLess (Local0, 0x80)) + { + ShiftLeft (One, Local0, TMP) + } + Else + { + Store (Zero, TMP) + } + Return (PRR0) + } + Method (_SRS, 1, NotSerialized) + { + CreateWordField (Arg0, 0x01, TMP) + FindSetRightBit (TMP, Local0) + Decrement (Local0) + Store (Local0, PRQ1) + } + } + Device(LNKC){ + Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link + Name(_UID, 3) + Name(_PRS, ResourceTemplate(){ + IRQ (Level, ActiveLow, Shared) + {3,4,5,6,7,9,10,11,12} + }) + Method (_STA, 0, NotSerialized) + { + Store (0x0B, Local0) + If (And (0x80, PRQ2, Local1)) + { + Store (0x09, Local0) + } + Return (Local0) + } + Method (_DIS, 0, NotSerialized) + { + Or (PRQ2, 0x80, PRQ2) + } + Method (_CRS, 0, NotSerialized) + { + Name (PRR0, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) + {1} + }) + CreateWordField (PRR0, 0x01, TMP) + Store (PRQ2, Local0) + If (LLess (Local0, 0x80)) + { + ShiftLeft (One, Local0, TMP) + } + Else + { + Store (Zero, TMP) + } + Return (PRR0) + } + Method (_SRS, 1, NotSerialized) + { + CreateWordField (Arg0, 0x01, TMP) + FindSetRightBit (TMP, Local0) + Decrement (Local0) + Store (Local0, PRQ2) + } + } + Device(LNKD){ + Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link + Name(_UID, 4) + Name(_PRS, ResourceTemplate(){ + IRQ (Level, ActiveLow, Shared) + {3,4,5,6,7,9,10,11,12} + }) + Method (_STA, 0, NotSerialized) + { + Store (0x0B, Local0) + If (And (0x80, PRQ3, Local1)) + { + Store (0x09, Local0) + } + Return (Local0) + } + Method (_DIS, 0, NotSerialized) + { + Or (PRQ3, 0x80, PRQ3) + } + Method (_CRS, 0, NotSerialized) + { + Name (PRR0, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) + {1} + }) + CreateWordField (PRR0, 0x01, TMP) + Store (PRQ3, Local0) + If (LLess (Local0, 0x80)) + { + ShiftLeft (One, Local0, TMP) + } + Else + { + Store (Zero, TMP) + } + Return (PRR0) + } + Method (_SRS, 1, NotSerialized) + { + CreateWordField (Arg0, 0x01, TMP) + FindSetRightBit (TMP, Local0) + Decrement (Local0) + Store (Local0, PRQ3) + } + } + } + + /* S5 = power off state */ + Name (_S5, Package (4) { + 0x00, // PM1a_CNT.SLP_TYP + 0x00, // PM2a_CNT.SLP_TYP + 0x00, // reserved + 0x00, // reserved + }) +} diff --git a/hw/acpi-dsdt.hex b/hw/acpi-dsdt.hex new file mode 100644 index 0000000..d58bd6f --- /dev/null +++ b/hw/acpi-dsdt.hex @@ -0,0 +1,222 @@ +/* + * + * Intel ACPI Component Architecture + * ASL Optimizing Compiler version 20060421 [Apr 29 2006] + * Copyright (C) 2000 - 2006 Intel Corporation + * Supports ACPI Specification Revision 3.0a + * + * Compilation of "/usr/local/home/bellard/qemu-current/hw/acpi-dsdt.dsl" - Wed May 3 22:49:16 2006 + * + * C source code output + * + */ +unsigned char AmlCode[] = +{ + 0x44,0x53,0x44,0x54,0x73,0x06,0x00,0x00, /* 00000000 "DSDTs..." */ + 0x01,0x39,0x51,0x45,0x4D,0x55,0x00,0x00, /* 00000008 ".9QEMU.." */ + 0x51,0x45,0x4D,0x55,0x44,0x53,0x44,0x54, /* 00000010 "QEMUDSDT" */ + 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x21,0x04,0x06,0x20,0x10,0x4F,0x04,0x5C, /* 00000020 "!.. .O.\" */ + 0x00,0x5B,0x80,0x43,0x4D,0x53,0x5F,0x01, /* 00000028 ".[.CMS_." */ + 0x0A,0x70,0x0A,0x02,0x5B,0x81,0x10,0x43, /* 00000030 ".p..[..C" */ + 0x4D,0x53,0x5F,0x01,0x43,0x4D,0x53,0x49, /* 00000038 "MS_.CMSI" */ + 0x08,0x43,0x4D,0x53,0x44,0x08,0x14,0x14, /* 00000040 ".CMSD..." */ + 0x43,0x4D,0x52,0x44,0x01,0x70,0x68,0x43, /* 00000048 "CMRD.phC" */ + 0x4D,0x53,0x49,0x70,0x43,0x4D,0x53,0x44, /* 00000050 "MSIpCMSD" */ + 0x60,0xA4,0x60,0x5B,0x80,0x44,0x42,0x47, /* 00000058 "`.`[.DBG" */ + 0x5F,0x01,0x0B,0x44,0xB0,0x0A,0x04,0x5B, /* 00000060 "_..D...[" */ + 0x81,0x0B,0x44,0x42,0x47,0x5F,0x03,0x44, /* 00000068 "..DBG_.D" */ + 0x42,0x47,0x4C,0x20,0x10,0x4E,0x25,0x5F, /* 00000070 "BGL .N%_" */ + 0x53,0x42,0x5F,0x5B,0x82,0x46,0x25,0x50, /* 00000078 "SB_[.F%P" */ + 0x43,0x49,0x30,0x08,0x5F,0x48,0x49,0x44, /* 00000080 "CI0._HID" */ + 0x0C,0x41,0xD0,0x0A,0x03,0x08,0x5F,0x41, /* 00000088 ".A...._A" */ + 0x44,0x52,0x00,0x08,0x5F,0x55,0x49,0x44, /* 00000090 "DR.._UID" */ + 0x01,0x08,0x5F,0x50,0x52,0x54,0x12,0x47, /* 00000098 ".._PRT.G" */ + 0x15,0x18,0x12,0x0B,0x04,0x0B,0xFF,0xFF, /* 000000A0 "........" */ + 0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0B, /* 000000A8 ".LNKA..." */ + 0x04,0x0B,0xFF,0xFF,0x01,0x4C,0x4E,0x4B, /* 000000B0 ".....LNK" */ + 0x42,0x00,0x12,0x0C,0x04,0x0B,0xFF,0xFF, /* 000000B8 "B......." */ + 0x0A,0x02,0x4C,0x4E,0x4B,0x43,0x00,0x12, /* 000000C0 "..LNKC.." */ + 0x0C,0x04,0x0B,0xFF,0xFF,0x0A,0x03,0x4C, /* 000000C8 ".......L" */ + 0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,0x0C, /* 000000D0 "NKD....." */ + 0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,0x4B, /* 000000D8 ".....LNK" */ + 0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF, /* 000000E0 "B......." */ + 0x01,0x00,0x01,0x4C,0x4E,0x4B,0x43,0x00, /* 000000E8 "...LNKC." */ + 0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00, /* 000000F0 "........" */ + 0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,0x12, /* 000000F8 "..LNKD.." */ + 0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A, /* 00000100 "........" */ + 0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D, /* 00000108 ".LNKA..." */ + 0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,0x4C, /* 00000110 ".......L" */ + 0x4E,0x4B,0x43,0x00,0x12,0x0D,0x04,0x0C, /* 00000118 "NKC....." */ + 0xFF,0xFF,0x02,0x00,0x01,0x4C,0x4E,0x4B, /* 00000120 ".....LNK" */ + 0x44,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF, /* 00000128 "D......." */ + 0x02,0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x41, /* 00000130 "....LNKA" */ + 0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x02, /* 00000138 "........" */ + 0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x42,0x00, /* 00000140 "...LNKB." */ + 0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x03,0x00, /* 00000148 "........" */ + 0x00,0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D, /* 00000150 ".LNKD..." */ + 0x04,0x0C,0xFF,0xFF,0x03,0x00,0x01,0x4C, /* 00000158 ".......L" */ + 0x4E,0x4B,0x41,0x00,0x12,0x0E,0x04,0x0C, /* 00000160 "NKA....." */ + 0xFF,0xFF,0x03,0x00,0x0A,0x02,0x4C,0x4E, /* 00000168 "......LN" */ + 0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF, /* 00000170 "KB......" */ + 0xFF,0x03,0x00,0x0A,0x03,0x4C,0x4E,0x4B, /* 00000178 ".....LNK" */ + 0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF, /* 00000180 "C......." */ + 0x04,0x00,0x00,0x4C,0x4E,0x4B,0x41,0x00, /* 00000188 "...LNKA." */ + 0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x04,0x00, /* 00000190 "........" */ + 0x01,0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0E, /* 00000198 ".LNKB..." */ + 0x04,0x0C,0xFF,0xFF,0x04,0x00,0x0A,0x02, /* 000001A0 "........" */ + 0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,0x04, /* 000001A8 "LNKC...." */ + 0x0C,0xFF,0xFF,0x04,0x00,0x0A,0x03,0x4C, /* 000001B0 ".......L" */ + 0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,0x0C, /* 000001B8 "NKD....." */ + 0xFF,0xFF,0x05,0x00,0x00,0x4C,0x4E,0x4B, /* 000001C0 ".....LNK" */ + 0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF, /* 000001C8 "B......." */ + 0x05,0x00,0x01,0x4C,0x4E,0x4B,0x43,0x00, /* 000001D0 "...LNKC." */ + 0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x05,0x00, /* 000001D8 "........" */ + 0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,0x12, /* 000001E0 "..LNKD.." */ + 0x0E,0x04,0x0C,0xFF,0xFF,0x05,0x00,0x0A, /* 000001E8 "........" */ + 0x03,0x4C,0x4E,0x4B,0x41,0x00,0x14,0x4C, /* 000001F0 ".LNKA..L" */ + 0x0D,0x5F,0x43,0x52,0x53,0x00,0x08,0x4D, /* 000001F8 "._CRS..M" */ + 0x45,0x4D,0x50,0x11,0x42,0x07,0x0A,0x6E, /* 00000200 "EMP.B..n" */ + 0x88,0x0D,0x00,0x02,0x0C,0x00,0x00,0x00, /* 00000208 "........" */ + 0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x01, /* 00000210 "........" */ + 0x47,0x01,0xF8,0x0C,0xF8,0x0C,0x01,0x08, /* 00000218 "G......." */ + 0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00, /* 00000220 "........" */ + 0x00,0x00,0xF7,0x0C,0x00,0x00,0xF8,0x0C, /* 00000228 "........" */ + 0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00, /* 00000230 "........" */ + 0x00,0x0D,0xFF,0xFF,0x00,0x00,0x00,0xF3, /* 00000238 "........" */ + 0x87,0x17,0x00,0x00,0x0C,0x03,0x00,0x00, /* 00000240 "........" */ + 0x00,0x00,0x00,0x00,0x0A,0x00,0xFF,0xFF, /* 00000248 "........" */ + 0x0B,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000250 "........" */ + 0x02,0x00,0x87,0x17,0x00,0x00,0x08,0x01, /* 00000258 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000260 "........" */ + 0xFF,0xFF,0xBF,0xFE,0x00,0x00,0x00,0x00, /* 00000268 "........" */ + 0x00,0x00,0x00,0x00,0x79,0x00,0x8A,0x4D, /* 00000270 "....y..M" */ + 0x45,0x4D,0x50,0x0A,0x5C,0x50,0x4D,0x49, /* 00000278 "EMP.\PMI" */ + 0x4E,0x8A,0x4D,0x45,0x4D,0x50,0x0A,0x60, /* 00000280 "N.MEMP.`" */ + 0x50,0x4D,0x41,0x58,0x8A,0x4D,0x45,0x4D, /* 00000288 "PMAX.MEM" */ + 0x50,0x0A,0x68,0x50,0x4C,0x45,0x4E,0x72, /* 00000290 "P.hPLENr" */ + 0x43,0x4D,0x52,0x44,0x0A,0x34,0x79,0x43, /* 00000298 "CMRD.4yC" */ + 0x4D,0x52,0x44,0x0A,0x35,0x0A,0x08,0x00, /* 000002A0 "MRD.5..." */ + 0x60,0x79,0x60,0x0A,0x10,0x60,0x72,0x60, /* 000002A8 "`y`..`r`" */ + 0x0C,0x00,0x00,0x00,0x01,0x60,0x70,0x60, /* 000002B0 ".....`p`" */ + 0x50,0x4D,0x49,0x4E,0x74,0x50,0x4D,0x41, /* 000002B8 "PMINtPMA" */ + 0x58,0x50,0x4D,0x49,0x4E,0x50,0x4C,0x45, /* 000002C0 "XPMINPLE" */ + 0x4E,0x75,0x50,0x4C,0x45,0x4E,0xA4,0x4D, /* 000002C8 "NuPLEN.M" */ + 0x45,0x4D,0x50,0x10,0x43,0x0A,0x2E,0x5F, /* 000002D0 "EMP.C.._" */ + 0x53,0x42,0x5F,0x50,0x43,0x49,0x30,0x5B, /* 000002D8 "SB_PCI0[" */ + 0x82,0x46,0x09,0x49,0x53,0x41,0x5F,0x08, /* 000002E0 ".F.ISA_." */ + 0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x01, /* 000002E8 "_ADR...." */ + 0x00,0x5B,0x80,0x50,0x34,0x30,0x43,0x02, /* 000002F0 ".[.P40C." */ + 0x0A,0x60,0x0A,0x04,0x5B,0x82,0x44,0x04, /* 000002F8 ".`..[.D." */ + 0x4B,0x42,0x44,0x5F,0x08,0x5F,0x48,0x49, /* 00000300 "KBD_._HI" */ + 0x44,0x0C,0x41,0xD0,0x03,0x03,0x14,0x09, /* 00000308 "D.A....." */ + 0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A,0x0F, /* 00000310 "_STA...." */ + 0x14,0x29,0x5F,0x43,0x52,0x53,0x00,0x08, /* 00000318 ".)_CRS.." */ + 0x54,0x4D,0x50,0x5F,0x11,0x18,0x0A,0x15, /* 00000320 "TMP_...." */ + 0x47,0x01,0x60,0x00,0x60,0x00,0x01,0x01, /* 00000328 "G.`.`..." */ + 0x47,0x01,0x64,0x00,0x64,0x00,0x01,0x01, /* 00000330 "G.d.d..." */ + 0x22,0x02,0x00,0x79,0x00,0xA4,0x54,0x4D, /* 00000338 ""..y..TM" */ + 0x50,0x5F,0x5B,0x82,0x33,0x4D,0x4F,0x55, /* 00000340 "P_[.3MOU" */ + 0x5F,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41, /* 00000348 "_._HID.A" */ + 0xD0,0x0F,0x13,0x14,0x09,0x5F,0x53,0x54, /* 00000350 "....._ST" */ + 0x41,0x00,0xA4,0x0A,0x0F,0x14,0x19,0x5F, /* 00000358 "A......_" */ + 0x43,0x52,0x53,0x00,0x08,0x54,0x4D,0x50, /* 00000360 "CRS..TMP" */ + 0x5F,0x11,0x08,0x0A,0x05,0x22,0x00,0x10, /* 00000368 "_....".." */ + 0x79,0x00,0xA4,0x54,0x4D,0x50,0x5F,0x10, /* 00000370 "y..TMP_." */ + 0x4F,0x2E,0x5F,0x53,0x42,0x5F,0x5B,0x81, /* 00000378 "O._SB_[." */ + 0x24,0x2F,0x03,0x50,0x43,0x49,0x30,0x49, /* 00000380 "$/.PCI0I" */ + 0x53,0x41,0x5F,0x50,0x34,0x30,0x43,0x01, /* 00000388 "SA_P40C." */ + 0x50,0x52,0x51,0x30,0x08,0x50,0x52,0x51, /* 00000390 "PRQ0.PRQ" */ + 0x31,0x08,0x50,0x52,0x51,0x32,0x08,0x50, /* 00000398 "1.PRQ2.P" */ + 0x52,0x51,0x33,0x08,0x5B,0x82,0x4E,0x0A, /* 000003A0 "RQ3.[.N." */ + 0x4C,0x4E,0x4B,0x41,0x08,0x5F,0x48,0x49, /* 000003A8 "LNKA._HI" */ + 0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,0x5F, /* 000003B0 "D.A...._" */ + 0x55,0x49,0x44,0x01,0x08,0x5F,0x50,0x52, /* 000003B8 "UID.._PR" */ + 0x53,0x11,0x09,0x0A,0x06,0x23,0xF8,0x1E, /* 000003C0 "S....#.." */ + 0x18,0x79,0x00,0x14,0x1A,0x5F,0x53,0x54, /* 000003C8 ".y..._ST" */ + 0x41,0x00,0x70,0x0A,0x0B,0x60,0xA0,0x0D, /* 000003D0 "A.p..`.." */ + 0x7B,0x0A,0x80,0x50,0x52,0x51,0x30,0x61, /* 000003D8 "{..PRQ0a" */ + 0x70,0x0A,0x09,0x60,0xA4,0x60,0x14,0x11, /* 000003E0 "p..`.`.." */ + 0x5F,0x44,0x49,0x53,0x00,0x7D,0x50,0x52, /* 000003E8 "_DIS.}PR" */ + 0x51,0x30,0x0A,0x80,0x50,0x52,0x51,0x30, /* 000003F0 "Q0..PRQ0" */ + 0x14,0x3F,0x5F,0x43,0x52,0x53,0x00,0x08, /* 000003F8 ".?_CRS.." */ + 0x50,0x52,0x52,0x30,0x11,0x09,0x0A,0x06, /* 00000400 "PRR0...." */ + 0x23,0x02,0x00,0x18,0x79,0x00,0x8B,0x50, /* 00000408 "#...y..P" */ + 0x52,0x52,0x30,0x01,0x54,0x4D,0x50,0x5F, /* 00000410 "RR0.TMP_" */ + 0x70,0x50,0x52,0x51,0x30,0x60,0xA0,0x0C, /* 00000418 "pPRQ0`.." */ + 0x95,0x60,0x0A,0x80,0x79,0x01,0x60,0x54, /* 00000420 ".`..y.`T" */ + 0x4D,0x50,0x5F,0xA1,0x07,0x70,0x00,0x54, /* 00000428 "MP_..p.T" */ + 0x4D,0x50,0x5F,0xA4,0x50,0x52,0x52,0x30, /* 00000430 "MP_.PRR0" */ + 0x14,0x1B,0x5F,0x53,0x52,0x53,0x01,0x8B, /* 00000438 ".._SRS.." */ + 0x68,0x01,0x54,0x4D,0x50,0x5F,0x82,0x54, /* 00000440 "h.TMP_.T" */ + 0x4D,0x50,0x5F,0x60,0x76,0x60,0x70,0x60, /* 00000448 "MP_`v`p`" */ + 0x50,0x52,0x51,0x30,0x5B,0x82,0x4F,0x0A, /* 00000450 "PRQ0[.O." */ + 0x4C,0x4E,0x4B,0x42,0x08,0x5F,0x48,0x49, /* 00000458 "LNKB._HI" */ + 0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,0x5F, /* 00000460 "D.A...._" */ + 0x55,0x49,0x44,0x0A,0x02,0x08,0x5F,0x50, /* 00000468 "UID..._P" */ + 0x52,0x53,0x11,0x09,0x0A,0x06,0x23,0xF8, /* 00000470 "RS....#." */ + 0x1E,0x18,0x79,0x00,0x14,0x1A,0x5F,0x53, /* 00000478 "..y..._S" */ + 0x54,0x41,0x00,0x70,0x0A,0x0B,0x60,0xA0, /* 00000480 "TA.p..`." */ + 0x0D,0x7B,0x0A,0x80,0x50,0x52,0x51,0x31, /* 00000488 ".{..PRQ1" */ + 0x61,0x70,0x0A,0x09,0x60,0xA4,0x60,0x14, /* 00000490 "ap..`.`." */ + 0x11,0x5F,0x44,0x49,0x53,0x00,0x7D,0x50, /* 00000498 "._DIS.}P" */ + 0x52,0x51,0x31,0x0A,0x80,0x50,0x52,0x51, /* 000004A0 "RQ1..PRQ" */ + 0x31,0x14,0x3F,0x5F,0x43,0x52,0x53,0x00, /* 000004A8 "1.?_CRS." */ + 0x08,0x50,0x52,0x52,0x30,0x11,0x09,0x0A, /* 000004B0 ".PRR0..." */ + 0x06,0x23,0x02,0x00,0x18,0x79,0x00,0x8B, /* 000004B8 ".#...y.." */ + 0x50,0x52,0x52,0x30,0x01,0x54,0x4D,0x50, /* 000004C0 "PRR0.TMP" */ + 0x5F,0x70,0x50,0x52,0x51,0x31,0x60,0xA0, /* 000004C8 "_pPRQ1`." */ + 0x0C,0x95,0x60,0x0A,0x80,0x79,0x01,0x60, /* 000004D0 "..`..y.`" */ + 0x54,0x4D,0x50,0x5F,0xA1,0x07,0x70,0x00, /* 000004D8 "TMP_..p." */ + 0x54,0x4D,0x50,0x5F,0xA4,0x50,0x52,0x52, /* 000004E0 "TMP_.PRR" */ + 0x30,0x14,0x1B,0x5F,0x53,0x52,0x53,0x01, /* 000004E8 "0.._SRS." */ + 0x8B,0x68,0x01,0x54,0x4D,0x50,0x5F,0x82, /* 000004F0 ".h.TMP_." */ + 0x54,0x4D,0x50,0x5F,0x60,0x76,0x60,0x70, /* 000004F8 "TMP_`v`p" */ + 0x60,0x50,0x52,0x51,0x31,0x5B,0x82,0x4F, /* 00000500 "`PRQ1[.O" */ + 0x0A,0x4C,0x4E,0x4B,0x43,0x08,0x5F,0x48, /* 00000508 ".LNKC._H" */ + 0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08, /* 00000510 "ID.A...." */ + 0x5F,0x55,0x49,0x44,0x0A,0x03,0x08,0x5F, /* 00000518 "_UID..._" */ + 0x50,0x52,0x53,0x11,0x09,0x0A,0x06,0x23, /* 00000520 "PRS....#" */ + 0xF8,0x1E,0x18,0x79,0x00,0x14,0x1A,0x5F, /* 00000528 "...y..._" */ + 0x53,0x54,0x41,0x00,0x70,0x0A,0x0B,0x60, /* 00000530 "STA.p..`" */ + 0xA0,0x0D,0x7B,0x0A,0x80,0x50,0x52,0x51, /* 00000538 "..{..PRQ" */ + 0x32,0x61,0x70,0x0A,0x09,0x60,0xA4,0x60, /* 00000540 "2ap..`.`" */ + 0x14,0x11,0x5F,0x44,0x49,0x53,0x00,0x7D, /* 00000548 ".._DIS.}" */ + 0x50,0x52,0x51,0x32,0x0A,0x80,0x50,0x52, /* 00000550 "PRQ2..PR" */ + 0x51,0x32,0x14,0x3F,0x5F,0x43,0x52,0x53, /* 00000558 "Q2.?_CRS" */ + 0x00,0x08,0x50,0x52,0x52,0x30,0x11,0x09, /* 00000560 "..PRR0.." */ + 0x0A,0x06,0x23,0x02,0x00,0x18,0x79,0x00, /* 00000568 "..#...y." */ + 0x8B,0x50,0x52,0x52,0x30,0x01,0x54,0x4D, /* 00000570 ".PRR0.TM" */ + 0x50,0x5F,0x70,0x50,0x52,0x51,0x32,0x60, /* 00000578 "P_pPRQ2`" */ + 0xA0,0x0C,0x95,0x60,0x0A,0x80,0x79,0x01, /* 00000580 "...`..y." */ + 0x60,0x54,0x4D,0x50,0x5F,0xA1,0x07,0x70, /* 00000588 "`TMP_..p" */ + 0x00,0x54,0x4D,0x50,0x5F,0xA4,0x50,0x52, /* 00000590 ".TMP_.PR" */ + 0x52,0x30,0x14,0x1B,0x5F,0x53,0x52,0x53, /* 00000598 "R0.._SRS" */ + 0x01,0x8B,0x68,0x01,0x54,0x4D,0x50,0x5F, /* 000005A0 "..h.TMP_" */ + 0x82,0x54,0x4D,0x50,0x5F,0x60,0x76,0x60, /* 000005A8 ".TMP_`v`" */ + 0x70,0x60,0x50,0x52,0x51,0x32,0x5B,0x82, /* 000005B0 "p`PRQ2[." */ + 0x4F,0x0A,0x4C,0x4E,0x4B,0x44,0x08,0x5F, /* 000005B8 "O.LNKD._" */ + 0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F, /* 000005C0 "HID.A..." */ + 0x08,0x5F,0x55,0x49,0x44,0x0A,0x04,0x08, /* 000005C8 "._UID..." */ + 0x5F,0x50,0x52,0x53,0x11,0x09,0x0A,0x06, /* 000005D0 "_PRS...." */ + 0x23,0xF8,0x1E,0x18,0x79,0x00,0x14,0x1A, /* 000005D8 "#...y..." */ + 0x5F,0x53,0x54,0x41,0x00,0x70,0x0A,0x0B, /* 000005E0 "_STA.p.." */ + 0x60,0xA0,0x0D,0x7B,0x0A,0x80,0x50,0x52, /* 000005E8 "`..{..PR" */ + 0x51,0x33,0x61,0x70,0x0A,0x09,0x60,0xA4, /* 000005F0 "Q3ap..`." */ + 0x60,0x14,0x11,0x5F,0x44,0x49,0x53,0x00, /* 000005F8 "`.._DIS." */ + 0x7D,0x50,0x52,0x51,0x33,0x0A,0x80,0x50, /* 00000600 "}PRQ3..P" */ + 0x52,0x51,0x33,0x14,0x3F,0x5F,0x43,0x52, /* 00000608 "RQ3.?_CR" */ + 0x53,0x00,0x08,0x50,0x52,0x52,0x30,0x11, /* 00000610 "S..PRR0." */ + 0x09,0x0A,0x06,0x23,0x02,0x00,0x18,0x79, /* 00000618 "...#...y" */ + 0x00,0x8B,0x50,0x52,0x52,0x30,0x01,0x54, /* 00000620 "..PRR0.T" */ + 0x4D,0x50,0x5F,0x70,0x50,0x52,0x51,0x33, /* 00000628 "MP_pPRQ3" */ + 0x60,0xA0,0x0C,0x95,0x60,0x0A,0x80,0x79, /* 00000630 "`...`..y" */ + 0x01,0x60,0x54,0x4D,0x50,0x5F,0xA1,0x07, /* 00000638 ".`TMP_.." */ + 0x70,0x00,0x54,0x4D,0x50,0x5F,0xA4,0x50, /* 00000640 "p.TMP_.P" */ + 0x52,0x52,0x30,0x14,0x1B,0x5F,0x53,0x52, /* 00000648 "RR0.._SR" */ + 0x53,0x01,0x8B,0x68,0x01,0x54,0x4D,0x50, /* 00000650 "S..h.TMP" */ + 0x5F,0x82,0x54,0x4D,0x50,0x5F,0x60,0x76, /* 00000658 "_.TMP_`v" */ + 0x60,0x70,0x60,0x50,0x52,0x51,0x33,0x08, /* 00000660 "`p`PRQ3." */ + 0x5F,0x53,0x35,0x5F,0x12,0x06,0x04,0x00, /* 00000668 "_S5_...." */ + 0x00,0x00,0x00, +}; diff --git a/hw/acpi.c b/hw/acpi.c new file mode 100644 index 0000000..9053142 --- /dev/null +++ b/hw/acpi.c @@ -0,0 +1,609 @@ +/* + * ACPI implementation + * + * Copyright (c) 2006 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License version 2 as published by the Free Software Foundation. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include "vl.h" + +//#define DEBUG + +/* i82731AB (PIIX4) compatible power management function */ +#define PM_FREQ 3579545 + +/* XXX: make them variable */ +#define PM_IO_BASE 0xb000 +#define SMI_CMD_IO_ADDR 0xb040 +#define ACPI_DBG_IO_ADDR 0xb044 + +typedef struct PIIX4PMState { + PCIDevice dev; + uint16_t pmsts; + uint16_t pmen; + uint16_t pmcntrl; + QEMUTimer *tmr_timer; + int64_t tmr_overflow_time; +} PIIX4PMState; + +#define RTC_EN (1 << 10) +#define PWRBTN_EN (1 << 8) +#define GBL_EN (1 << 5) +#define TMROF_EN (1 << 0) + +#define SCI_EN (1 << 0) + +#define SUS_EN (1 << 13) + +/* Note: only used for ACPI bios init. Could be deleted when ACPI init + is integrated in Bochs BIOS */ +static PIIX4PMState *piix4_pm_state; + +static uint32_t get_pmtmr(PIIX4PMState *s) +{ + uint32_t d; + d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec); + return d & 0xffffff; +} + +static int get_pmsts(PIIX4PMState *s) +{ + int64_t d; + int pmsts; + pmsts = s->pmsts; + d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec); + if (d >= s->tmr_overflow_time) + s->pmsts |= TMROF_EN; + return pmsts; +} + +static void pm_update_sci(PIIX4PMState *s) +{ + int sci_level, pmsts; + int64_t expire_time; + + pmsts = get_pmsts(s); + sci_level = (((pmsts & s->pmen) & + (RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN)) != 0); + pci_set_irq(&s->dev, 0, sci_level); + /* schedule a timer interruption if needed */ + if ((s->pmen & TMROF_EN) && !(pmsts & TMROF_EN)) { + expire_time = muldiv64(s->tmr_overflow_time, ticks_per_sec, PM_FREQ); + qemu_mod_timer(s->tmr_timer, expire_time); + } else { + qemu_del_timer(s->tmr_timer); + } +} + +static void pm_tmr_timer(void *opaque) +{ + PIIX4PMState *s = opaque; + pm_update_sci(s); +} + +static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val) +{ + PIIX4PMState *s = opaque; + addr &= 0x3f; + switch(addr) { + case 0x00: + { + int64_t d; + int pmsts; + pmsts = get_pmsts(s); + if (pmsts & val & TMROF_EN) { + /* if TMRSTS is reset, then compute the new overflow time */ + d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec); + s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL; + } + s->pmsts &= ~val; + pm_update_sci(s); + } + break; + case 0x02: + s->pmen = val; + pm_update_sci(s); + break; + case 0x04: + { + int sus_typ; + s->pmcntrl = val & ~(SUS_EN); + if (val & SUS_EN) { + /* change suspend type */ + sus_typ = (val >> 10) & 3; + switch(sus_typ) { + case 0: /* soft power off */ + qemu_system_shutdown_request(); + break; + default: + break; + } + } + } + break; + default: + break; + } +#ifdef DEBUG + printf("PM writew port=0x%04x val=0x%04x\n", addr, val); +#endif +} + +static uint32_t pm_ioport_readw(void *opaque, uint32_t addr) +{ + PIIX4PMState *s = opaque; + uint32_t val; + + addr &= 0x3f; + switch(addr) { + case 0x00: + val = get_pmsts(s); + break; + case 0x02: + val = s->pmen; + break; + case 0x04: + val = s->pmcntrl; + break; + default: + val = 0; + break; + } +#ifdef DEBUG + printf("PM readw port=0x%04x val=0x%04x\n", addr, val); +#endif + return val; +} + +static void pm_ioport_writel(void *opaque, uint32_t addr, uint32_t val) +{ + // PIIX4PMState *s = opaque; + addr &= 0x3f; +#ifdef DEBUG + printf("PM writel port=0x%04x val=0x%08x\n", addr, val); +#endif +} + +static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) +{ + PIIX4PMState *s = opaque; + uint32_t val; + + addr &= 0x3f; + switch(addr) { + case 0x08: + val = get_pmtmr(s); + break; + default: + val = 0; + break; + } +#ifdef DEBUG + printf("PM readl port=0x%04x val=0x%08x\n", addr, val); +#endif + return val; +} + +static void smi_cmd_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PIIX4PMState *s = opaque; +#ifdef DEBUG + printf("SMI cmd val=0x%02x\n", val); +#endif + switch(val) { + case 0xf0: /* ACPI disable */ + s->pmcntrl &= ~SCI_EN; + break; + case 0xf1: /* ACPI enable */ + s->pmcntrl |= SCI_EN; + break; + } +} + +static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val) +{ +#if defined(DEBUG) + printf("ACPI: DBG: 0x%08x\n", val); +#endif +} + +/* XXX: we still add it to the PIIX3 and we count on the fact that + OSes are smart enough to accept this strange configuration */ +void piix4_pm_init(PCIBus *bus) +{ + PIIX4PMState *s; + uint8_t *pci_conf; + uint32_t pm_io_base; + + s = (PIIX4PMState *)pci_register_device(bus, + "PM", sizeof(PIIX4PMState), + ((PCIDevice *)piix3_state)->devfn + 3, + NULL, NULL); + pci_conf = s->dev.config; + pci_conf[0x00] = 0x86; + pci_conf[0x01] = 0x80; + pci_conf[0x02] = 0x13; + pci_conf[0x03] = 0x70; + pci_conf[0x08] = 0x00; // revision number + pci_conf[0x09] = 0x00; + pci_conf[0x0a] = 0x80; // other bridge device + pci_conf[0x0b] = 0x06; // bridge device + pci_conf[0x0e] = 0x00; // header_type + pci_conf[0x3d] = 0x01; // interrupt pin 1 + pci_conf[0x60] = 0x10; // release number + + pm_io_base = PM_IO_BASE; + pci_conf[0x40] = pm_io_base | 1; + pci_conf[0x41] = pm_io_base >> 8; + register_ioport_write(pm_io_base, 64, 2, pm_ioport_writew, s); + register_ioport_read(pm_io_base, 64, 2, pm_ioport_readw, s); + register_ioport_write(pm_io_base, 64, 4, pm_ioport_writel, s); + register_ioport_read(pm_io_base, 64, 4, pm_ioport_readl, s); + + register_ioport_write(SMI_CMD_IO_ADDR, 1, 1, smi_cmd_writeb, s); + register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s); + + s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s); + piix4_pm_state = s; +} + +/* ACPI tables */ +/* XXX: move them in the Bochs BIOS ? */ + +/*************************************************/ + +/* Table structure from Linux kernel (the ACPI tables are under the + BSD license) */ + +#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \ + uint8_t signature [4]; /* ACPI signature (4 ASCII characters) */\ + uint32_t length; /* Length of table, in bytes, including header */\ + uint8_t revision; /* ACPI Specification minor version # */\ + uint8_t checksum; /* To make sum of entire table == 0 */\ + uint8_t oem_id [6]; /* OEM identification */\ + uint8_t oem_table_id [8]; /* OEM table identification */\ + uint32_t oem_revision; /* OEM revision number */\ + uint8_t asl_compiler_id [4]; /* ASL compiler vendor ID */\ + uint32_t asl_compiler_revision; /* ASL compiler revision number */ + + +struct acpi_table_header /* ACPI common table header */ +{ + ACPI_TABLE_HEADER_DEF +}; + +struct rsdp_descriptor /* Root System Descriptor Pointer */ +{ + uint8_t signature [8]; /* ACPI signature, contains "RSD PTR " */ + uint8_t checksum; /* To make sum of struct == 0 */ + uint8_t oem_id [6]; /* OEM identification */ + uint8_t revision; /* Must be 0 for 1.0, 2 for 2.0 */ + uint32_t rsdt_physical_address; /* 32-bit physical address of RSDT */ + uint32_t length; /* XSDT Length in bytes including hdr */ + uint64_t xsdt_physical_address; /* 64-bit physical address of XSDT */ + uint8_t extended_checksum; /* Checksum of entire table */ + uint8_t reserved [3]; /* Reserved field must be 0 */ +}; + +/* + * ACPI 1.0 Root System Description Table (RSDT) + */ +struct rsdt_descriptor_rev1 +{ + ACPI_TABLE_HEADER_DEF /* ACPI common table header */ + uint32_t table_offset_entry [2]; /* Array of pointers to other */ + /* ACPI tables */ +}; + +/* + * ACPI 1.0 Firmware ACPI Control Structure (FACS) + */ +struct facs_descriptor_rev1 +{ + uint8_t signature[4]; /* ACPI Signature */ + uint32_t length; /* Length of structure, in bytes */ + uint32_t hardware_signature; /* Hardware configuration signature */ + uint32_t firmware_waking_vector; /* ACPI OS waking vector */ + uint32_t global_lock; /* Global Lock */ + uint32_t S4bios_f : 1; /* Indicates if S4BIOS support is present */ + uint32_t reserved1 : 31; /* Must be 0 */ + uint8_t resverved3 [40]; /* Reserved - must be zero */ +}; + + +/* + * ACPI 1.0 Fixed ACPI Description Table (FADT) + */ +struct fadt_descriptor_rev1 +{ + ACPI_TABLE_HEADER_DEF /* ACPI common table header */ + uint32_t firmware_ctrl; /* Physical address of FACS */ + uint32_t dsdt; /* Physical address of DSDT */ + uint8_t model; /* System Interrupt Model */ + uint8_t reserved1; /* Reserved */ + uint16_t sci_int; /* System vector of SCI interrupt */ + uint32_t smi_cmd; /* Port address of SMI command port */ + uint8_t acpi_enable; /* Value to write to smi_cmd to enable ACPI */ + uint8_t acpi_disable; /* Value to write to smi_cmd to disable ACPI */ + uint8_t S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ + uint8_t reserved2; /* Reserved - must be zero */ + uint32_t pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ + uint32_t pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ + uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ + uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ + uint32_t pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ + uint32_t pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ + uint32_t gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ + uint32_t gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ + uint8_t pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ + uint8_t pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ + uint8_t pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ + uint8_t pm_tmr_len; /* Byte Length of ports at pm_tm_blk */ + uint8_t gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ + uint8_t gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ + uint8_t gpe1_base; /* Offset in gpe model where gpe1 events start */ + uint8_t reserved3; /* Reserved */ + uint16_t plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ + uint16_t plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ + uint16_t flush_size; /* Size of area read to flush caches */ + uint16_t flush_stride; /* Stride used in flushing caches */ + uint8_t duty_offset; /* Bit location of duty cycle field in p_cnt reg */ + uint8_t duty_width; /* Bit width of duty cycle field in p_cnt reg */ + uint8_t day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ + uint8_t mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ + uint8_t century; /* Index to century in RTC CMOS RAM */ + uint8_t reserved4; /* Reserved */ + uint8_t reserved4a; /* Reserved */ + uint8_t reserved4b; /* Reserved */ +#if 0 + uint32_t wb_invd : 1; /* The wbinvd instruction works properly */ + uint32_t wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */ + uint32_t proc_c1 : 1; /* All processors support C1 state */ + uint32_t plvl2_up : 1; /* C2 state works on MP system */ + uint32_t pwr_button : 1; /* Power button is handled as a generic feature */ + uint32_t sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */ + uint32_t fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */ + uint32_t rtcs4 : 1; /* RTC wakeup stat not possible from S4 */ + uint32_t tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */ + uint32_t reserved5 : 23; /* Reserved - must be zero */ +#else + uint32_t flags; +#endif +}; + +/* + * MADT values and structures + */ + +/* Values for MADT PCATCompat */ + +#define DUAL_PIC 0 +#define MULTIPLE_APIC 1 + + +/* Master MADT */ + +struct multiple_apic_table +{ + ACPI_TABLE_HEADER_DEF /* ACPI common table header */ + uint32_t local_apic_address; /* Physical address of local APIC */ +#if 0 + uint32_t PCATcompat : 1; /* A one indicates system also has dual 8259s */ + uint32_t reserved1 : 31; +#else + uint32_t flags; +#endif +}; + + +/* Values for Type in APIC_HEADER_DEF */ + +#define APIC_PROCESSOR 0 +#define APIC_IO 1 +#define APIC_XRUPT_OVERRIDE 2 +#define APIC_NMI 3 +#define APIC_LOCAL_NMI 4 +#define APIC_ADDRESS_OVERRIDE 5 +#define APIC_IO_SAPIC 6 +#define APIC_LOCAL_SAPIC 7 +#define APIC_XRUPT_SOURCE 8 +#define APIC_RESERVED 9 /* 9 and greater are reserved */ + +/* + * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE) + */ +#define APIC_HEADER_DEF /* Common APIC sub-structure header */\ + uint8_t type; \ + uint8_t length; + +/* Sub-structures for MADT */ + +struct madt_processor_apic +{ + APIC_HEADER_DEF + uint8_t processor_id; /* ACPI processor id */ + uint8_t local_apic_id; /* Processor's local APIC id */ +#if 0 + uint32_t processor_enabled: 1; /* Processor is usable if set */ + uint32_t reserved2 : 31; /* Reserved, must be zero */ +#else + uint32_t flags; +#endif +}; + +struct madt_io_apic +{ + APIC_HEADER_DEF + uint8_t io_apic_id; /* I/O APIC ID */ + uint8_t reserved; /* Reserved - must be zero */ + uint32_t address; /* APIC physical address */ + uint32_t interrupt; /* Global system interrupt where INTI + * lines start */ +}; + +#include "acpi-dsdt.hex" + +static int acpi_checksum(const uint8_t *data, int len) +{ + int sum, i; + sum = 0; + for(i = 0; i < len; i++) + sum += data[i]; + return (-sum) & 0xff; +} + +static void acpi_build_table_header(struct acpi_table_header *h, + char *sig, int len) +{ + memcpy(h->signature, sig, 4); + h->length = cpu_to_le32(len); + h->revision = 0; + memcpy(h->oem_id, "QEMU ", 6); + memcpy(h->oem_table_id, "QEMU", 4); + memcpy(h->oem_table_id + 4, sig, 4); + h->oem_revision = cpu_to_le32(1); + memcpy(h->asl_compiler_id, "QEMU", 4); + h->asl_compiler_revision = cpu_to_le32(1); + h->checksum = acpi_checksum((void *)h, len); +} + +#define ACPI_TABLES_BASE 0x000e8000 + +/* base_addr must be a multiple of 4KB */ +void acpi_bios_init(void) +{ + struct rsdp_descriptor *rsdp; + struct rsdt_descriptor_rev1 *rsdt; + struct fadt_descriptor_rev1 *fadt; + struct facs_descriptor_rev1 *facs; + struct multiple_apic_table *madt; + uint8_t *dsdt; + uint32_t base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr; + uint32_t pm_io_base, acpi_tables_size, madt_addr, madt_size; + int i; + + /* compute PCI I/O addresses */ + pm_io_base = (piix4_pm_state->dev.config[0x40] | + (piix4_pm_state->dev.config[0x41] << 8)) & ~0x3f; + + base_addr = ACPI_TABLES_BASE; + + /* reserve memory space for tables */ + addr = base_addr; + rsdp = (void *)(phys_ram_base + addr); + addr += sizeof(*rsdp); + + rsdt_addr = addr; + rsdt = (void *)(phys_ram_base + addr); + addr += sizeof(*rsdt); + + fadt_addr = addr; + fadt = (void *)(phys_ram_base + addr); + addr += sizeof(*fadt); + + /* XXX: FACS should be in RAM */ + addr = (addr + 63) & ~63; /* 64 byte alignment for FACS */ + facs_addr = addr; + facs = (void *)(phys_ram_base + addr); + addr += sizeof(*facs); + + dsdt_addr = addr; + dsdt = (void *)(phys_ram_base + addr); + addr += sizeof(AmlCode); + + madt_addr = addr; + madt_size = sizeof(*madt) + + sizeof(struct madt_processor_apic) * smp_cpus + + sizeof(struct madt_io_apic); + madt = (void *)(phys_ram_base + addr); + addr += madt_size; + + acpi_tables_size = addr - base_addr; + + cpu_register_physical_memory(base_addr, acpi_tables_size, + base_addr | IO_MEM_ROM); + + /* RSDP */ + memset(rsdp, 0, sizeof(*rsdp)); + memcpy(rsdp->signature, "RSD PTR ", 8); + memcpy(rsdp->oem_id, "QEMU ", 6); + rsdp->rsdt_physical_address = cpu_to_le32(rsdt_addr); + rsdp->checksum = acpi_checksum((void *)rsdp, 20); + + /* RSDT */ + rsdt->table_offset_entry[0] = cpu_to_le32(fadt_addr); + rsdt->table_offset_entry[1] = cpu_to_le32(madt_addr); + acpi_build_table_header((struct acpi_table_header *)rsdt, + "RSDT", sizeof(*rsdt)); + + /* FADT */ + memset(fadt, 0, sizeof(*fadt)); + fadt->firmware_ctrl = cpu_to_le32(facs_addr); + fadt->dsdt = cpu_to_le32(dsdt_addr); + fadt->model = 1; + fadt->reserved1 = 0; + fadt->sci_int = cpu_to_le16(piix4_pm_state->dev.config[0x3c]); + fadt->smi_cmd = cpu_to_le32(SMI_CMD_IO_ADDR); + fadt->acpi_enable = 0xf1; + fadt->acpi_disable = 0xf0; + fadt->pm1a_evt_blk = cpu_to_le32(pm_io_base); + fadt->pm1a_cnt_blk = cpu_to_le32(pm_io_base + 0x04); + fadt->pm_tmr_blk = cpu_to_le32(pm_io_base + 0x08); + fadt->pm1_evt_len = 4; + fadt->pm1_cnt_len = 2; + fadt->pm_tmr_len = 4; + fadt->plvl2_lat = cpu_to_le16(50); + fadt->plvl3_lat = cpu_to_le16(50); + fadt->plvl3_lat = cpu_to_le16(50); + /* WBINVD + PROC_C1 + PWR_BUTTON + SLP_BUTTON + FIX_RTC */ + fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 4) | (1 << 5) | (1 << 6)); + acpi_build_table_header((struct acpi_table_header *)fadt, "FACP", + sizeof(*fadt)); + + /* FACS */ + memset(facs, 0, sizeof(*facs)); + memcpy(facs->signature, "FACS", 4); + facs->length = cpu_to_le32(sizeof(*facs)); + + /* DSDT */ + memcpy(dsdt, AmlCode, sizeof(AmlCode)); + + /* MADT */ + { + struct madt_processor_apic *apic; + struct madt_io_apic *io_apic; + + memset(madt, 0, madt_size); + madt->local_apic_address = cpu_to_le32(0xfee00000); + madt->flags = cpu_to_le32(1); + apic = (void *)(madt + 1); + for(i=0;itype = APIC_PROCESSOR; + apic->length = sizeof(*apic); + apic->processor_id = i; + apic->local_apic_id = i; + apic->flags = cpu_to_le32(1); + apic++; + } + io_apic = (void *)apic; + io_apic->type = APIC_IO; + io_apic->length = sizeof(*io_apic); + io_apic->io_apic_id = smp_cpus; + io_apic->address = cpu_to_le32(0xfec00000); + io_apic->interrupt = cpu_to_le32(0); + + acpi_build_table_header((struct acpi_table_header *)madt, + "APIC", madt_size); + } +} diff --git a/hw/pc.c b/hw/pc.c index 4add257..b9bfd83 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -836,10 +836,15 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device, usb_attach(usb_root_ports[0], vm_usb_hub); } + if (pci_enabled && acpi_enabled) { + piix4_pm_init(pci_bus); + } /* must be done after all PCI devices are instanciated */ /* XXX: should be done in the Bochs BIOS */ if (pci_enabled) { pci_bios_init(); + if (acpi_enabled) + acpi_bios_init(); } } diff --git a/vl.c b/vl.c index c08b39d..e828d31 100644 --- a/vl.c +++ b/vl.c @@ -157,6 +157,7 @@ int vnc_display = -1; #else #define MAX_CPUS 1 #endif +int acpi_enabled = 1; /***********************************************************/ /* x86 ISA bus support */ @@ -4675,6 +4676,7 @@ void help(void) " translation (t=none or lba) (usually qemu can guess them)\n" "-L path set the directory for the BIOS and VGA BIOS\n" #ifdef USE_KQEMU + "-kernel-kqemu enable KQEMU full virtualization (default is user mode only)\n" "-no-kqemu disable KQEMU kernel module usage\n" #endif #ifdef USE_CODE_COPY @@ -4683,6 +4685,7 @@ void help(void) #ifdef TARGET_I386 "-std-vga simulate a standard VGA card with VESA Bochs Extensions\n" " (default is CL-GD5446 PCI VGA)\n" + "-no-acpi disable ACPI\n" #endif "-loadvm file start right away with a saved state (loadvm in monitor)\n" "-vnc display start a VNC server on display\n" @@ -4770,6 +4773,7 @@ enum { QEMU_OPTION_usbdevice, QEMU_OPTION_smp, QEMU_OPTION_vnc, + QEMU_OPTION_no_acpi, }; typedef struct QEMUOption { @@ -4842,6 +4846,7 @@ const QEMUOption qemu_options[] = { /* temporary options */ { "usb", 0, QEMU_OPTION_usb }, { "cirrusvga", 0, QEMU_OPTION_cirrusvga }, + { "no-acpi", 0, QEMU_OPTION_no_acpi }, { NULL }, }; @@ -5443,6 +5448,9 @@ int main(int argc, char **argv) exit(1); } break; + case QEMU_OPTION_no_acpi: + acpi_enabled = 0; + break; } } } diff --git a/vl.h b/vl.h index ddf8892..58a7877 100644 --- a/vl.h +++ b/vl.h @@ -840,6 +840,11 @@ int pit_get_out(PITState *pit, int channel, int64_t current_time); void pcspk_init(PITState *); int pcspk_audio_init(AudioState *); +/* acpi.c */ +extern int acpi_enabled; +void piix4_pm_init(PCIBus *bus); +void acpi_bios_init(void); + /* pc.c */ extern QEMUMachine pc_machine; extern QEMUMachine isapc_machine; -- 2.7.4