From 6453b9532b5f77d19837b159c4d074f0af9f141b Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 May 2021 22:46:33 +0300 Subject: [PATCH] gpio: xilinx: No need to disable IRQs in the handler In IRQ handler interrupts are already disabled, hence no need to repeat it. Even in the threaded case, it is not a problem because IRQ framework keeps interrupt disabled there as well. Remove disabling IRQ part in the handler. Signed-off-by: Andy Shevchenko Tested-by: Neeli Srinivas Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-xilinx.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 01e6459..0c43baa 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -509,14 +509,13 @@ static void xgpio_irqhandler(struct irq_desc *desc) int irq_offset; u32 status; u32 bit; - unsigned long flags; status = xgpio_readreg(chip->regs + XGPIO_IPISR_OFFSET); xgpio_writereg(chip->regs + XGPIO_IPISR_OFFSET, status); chained_irq_enter(irqchip, desc); - spin_lock_irqsave(&chip->gpio_lock, flags); + spin_lock(&chip->gpio_lock); xgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, all); @@ -533,7 +532,7 @@ static void xgpio_irqhandler(struct irq_desc *desc) bitmap_copy(chip->last_irq_read, all, 64); bitmap_or(all, rising, falling, 64); - spin_unlock_irqrestore(&chip->gpio_lock, flags); + spin_unlock(&chip->gpio_lock); dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling); -- 2.7.4