From 63dac0f4924b97a6b91b86259cdc4520b4d6254e Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 12 Jun 2017 17:35:00 +0200 Subject: [PATCH] arm64: dts: marvell: add gpio support for Armada 7K/8K Enable gpio support for CP and AP on the Marvell Armada 7K/8K SoCs. The Armada 8K has two CP110 blocks, each having two GPIO controllers. However, in each CP110 block, one of the GPIO controller cannot be used: in the master CP110, only the second GPIO controller can be used, while on the slave CP110, only the first GPIO controller can be used. On the other side, the Armada 7K has only one CP110, but both its GPIO controllers can be used. For this reason, the GPIO controllers are marked as "disabled" in the armada-cp110-master.dtsi and armada-cp110-slave.dtsi files, and only enabled in the per-SoC dtsi files. Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 15 +++++++++++++++ arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 10 ++++++++++ .../boot/dts/marvell/armada-cp110-master.dtsi | 21 +++++++++++++++++++++ .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 22 ++++++++++++++++++++++ 5 files changed, 84 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi index f6c2266..860b6ae 100644 --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi @@ -46,6 +46,21 @@ #include "armada-cp110-master.dtsi" +/ { + aliases { + gpio1 = &cpm_gpio1; + gpio2 = &cpm_gpio2; + }; +}; + +&cpm_gpio1 { + status = "okay"; +}; + +&cpm_gpio2 { + status = "okay"; +}; + &cpm_syscon0 { cpm_pinctrl: pinctrl { compatible = "marvell,armada-7k-pinctrl"; diff --git a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi index 93d1de0..666ebe9 100644 --- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi @@ -47,6 +47,22 @@ #include "armada-cp110-master.dtsi" #include "armada-cp110-slave.dtsi" +/ { + aliases { + gpio1 = &cps_gpio1; + gpio2 = &cpm_gpio2; + }; +}; + +/* The 80x0 has two CP blocks, but uses only one block from each. */ +&cps_gpio1 { + status = "okay"; +}; + +&cpm_gpio2 { + status = "okay"; +}; + &cpm_syscon0 { cpm_pinctrl: pinctrl { compatible = "marvell,armada-8k-cpm-pinctrl"; diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index b9b984e..2557d69 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -57,6 +57,7 @@ aliases { serial0 = &uart0; serial1 = &uart1; + gpio0 = &ap_gpio; }; psci { @@ -256,6 +257,15 @@ ap_pinctrl: pinctrl { compatible = "marvell,ap806-pinctrl"; }; + + ap_gpio: gpio { + compatible = "marvell,armada-8k-gpio"; + offset = <0x1040>; + ngpios = <19>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ap_pinctrl 0 0 19>; + }; }; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index 8076681..7835d4f 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -114,6 +114,27 @@ compatible = "marvell,cp110-clock"; #clock-cells = <2>; }; + + cpm_gpio1: gpio@100 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x100>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cpm_pinctrl 0 0 32>; + status = "disabled"; + + }; + + cpm_gpio2: gpio@140 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x140>; + ngpios = <31>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cpm_pinctrl 0 32 31>; + status = "disabled"; + }; }; cpm_rtc: rtc@284000 { diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index a88300ae..22e4feb 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -121,6 +121,28 @@ compatible = "marvell,cp110-clock"; #clock-cells = <2>; }; + + cps_gpio1: gpio@100 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x100>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cps_pinctrl 0 0 32>; + status = "disabled"; + + }; + + cps_gpio2: gpio@140 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x140>; + ngpios = <31>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cps_pinctrl 0 32 31>; + status = "disabled"; + }; + }; cps_sata0: sata@540000 { -- 2.7.4