From 6384d9ea313331b26cd2f0b250affef3bb3cfb41 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 26 Nov 2018 17:02:01 +0000 Subject: [PATCH] AMDGPU: Only add implicit super-reg def for first subreg llvm-svn: 347572 --- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index 669a60f..ddb2889 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -901,7 +901,7 @@ bool SIRegisterInfo::restoreSGPR(MachineBasicBlock::iterator MI, .addImm(0) // glc .addMemOperand(MMO); - if (NumSubRegs > 1) + if (NumSubRegs > 1 && i == 0) MIB.addReg(SuperReg, RegState::ImplicitDefine); continue; @@ -915,7 +915,7 @@ bool SIRegisterInfo::restoreSGPR(MachineBasicBlock::iterator MI, .addReg(Spill.VGPR) .addImm(Spill.Lane); - if (NumSubRegs > 1) + if (NumSubRegs > 1 && i == 0) MIB.addReg(SuperReg, RegState::ImplicitDefine); } else { if (OnlyToVGPR) -- 2.7.4