From 633a5e0fe69407aaa32af836f8aaee02b648c7e8 Mon Sep 17 00:00:00 2001
From: "Kim, HeungJun" <riverful.kim@samsung.com>
Date: Fri, 22 May 2009 18:35:09 +0900
Subject: [PATCH] [S5PC100] modified cpu_init.S using s5pc1xx.h

---
 cpu/arm_cortexa8/s5pc100/cpu_init.S | 61 +++++++++++++++++++------------------
 drivers/serial/s5pc100.c            |  2 +-
 2 files changed, 32 insertions(+), 31 deletions(-)

diff --git a/cpu/arm_cortexa8/s5pc100/cpu_init.S b/cpu/arm_cortexa8/s5pc100/cpu_init.S
index 7c785c3..af88d8e 100644
--- a/cpu/arm_cortexa8/s5pc100/cpu_init.S
+++ b/cpu/arm_cortexa8/s5pc100/cpu_init.S
@@ -24,150 +24,151 @@
  */
 
 #include <config.h>
-#include <s5pc100.h>
+/*#include <s5pc100.h>*/
+#include <s5pc1xx.h>
 
 	.globl mem_ctrl_asm_init
 mem_ctrl_asm_init:
 	/* DLL parameter setting */
-	ldr r0, =0xe6000018
+	ldr r0, =S5P_PHYCONTROL0			@ 0xe6000018
 	ldr r1, =0x50101000
 	str r1, [r0]
 
-	ldr r0, =0xe600001c
+	ldr r0, =S5P_PHYCONTROL1			@ 0xe600001c
 	ldr r1, =0xf4
 	str r1, [r0]
 
-	ldr r0, =0xe6000020
+	ldr r0, =S5P_PHYCONTROL2			@ 0xe6000020
 	ldr r1, =0x0
 	str r1, [r0]
 
 	/* DLL on */
-	ldr r0, =0xe6000018
+	ldr r0, =S5P_PHYCONTROL0			@ 0xe6000018
 	ldr r1, =0x50101002
 	str r1, [r0]
 
 	/* DLL start */
-	ldr r0, =0xe6000018
+	ldr r0, =S5P_PHUCONTROL0			@ 0xe6000018
 	ldr r1, =0x50101003
 	str r1, [r0]
 
 	/* Force value locking for DLL off */
-	ldr r0, =0xe6000018
+	ldr r0, =S5P_PHYCONTROL0			@ 0xe6000018
 	ldr r1, =0x50101003
 	str r1, [r0]
 
 	/* DLL off */
-	ldr r0, =0xe6000018
+	ldr r0, =S5P_PHYCONTROL0			@ 0xe6000018
 	ldr r1, =0x50101001
 	str r1, [r0]
 
 	/* auto refresh off */
-	ldr r0, =0xe6000000
+	ldr r0, =S5P_CONCONTROL				@ 0xe6000000
 	ldr r1, =0xff001010
 	str r1, [r0]
 
 	/* BL%LE %LONG4, 2 chip, LPDDR, dynamic self refresh, force precharge, dynamic power down off */
-	ldr r0, =0xe6000004
+	ldr r0, =S5P_MEMCONTROL				@ 0xe6000004
 	ldr r1, =0x00212100
 	str r1, [r0]
 
 	/* 128MB config, 4banks */
-	ldr r0, =0xe6000008
+	ldr r0, =S5P_MEMCONFIG0				@ 0xe6000008
 	ldr r1, =0x20f80222
 	str r1, [r0]
 
-	ldr r0, =0xe600000c
+	ldr r0, =S5P_MEMCONFIG1				@ 0xe600000c
 	ldr r1, =0x28f80222
 	str r1, [r0]
 
-	ldr r0, =0xe6000014
+	ldr r0, =S5P_PRECHCONFIG			@ 0xe6000014
 	ldr r1, =0x20000000
 	str r1, [r0]
 
 	/* 7.8us*166MHz%LE %LONG1294(0x50E) 7.8us*133MHz%LE %LONG1038(0x40E),
 	 *  100MHz%LE %LONG780(0x30C), 20MHz%LE %LONG156(0x9C), 10MHz%LE %LONG78(0x4E)
 	 */
-	ldr r0, =0xe6000030
+	ldr r0, =S5P_TIMINGAREF				@ 0xe6000030
 	ldr r1, =0x0000050e
 	str r1, [r0]
 
 	/* 133MHz */
-	ldr r0, =0xe6000034
+	ldr r0, =S5P_TIMINGROW				@ 0xe6000034
 	ldr r1, =0x0c233287
 	str r1, [r0]
 
 	/* twtr=3 twr=2 trtp=3 cl=3 wl=3 rl=3 */
-	ldr r0, =0xe6000038
+	ldr r0, =S5P_TIMINGDATA				@ 0xe6000038
 	ldr r1, =0x32330303
 	str r1, [r0]
 
 	/* tfaw=4 sxsr=0x14 txp=0x14 tcke=3 tmrd=3 */
-	ldr r0, =0xe600003c
+	ldr r0, =S5P_TIMINGPOWER			@ 0xe600003c
 	ldr r1, =0x04141433
 	str r1, [r0]
 
 	/* chip0 Deselect */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x07000000
 	str r1, [r0]
 
 	/* chip0 PALL */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x01000000
 	str r1, [r0]
 
 	/* chip0 REFA */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x05000000
 	str r1, [r0]
 
 	/* chip0 REFA */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x05000000
 	str r1, [r0]
 
 	/* chip0 MRS, CL%LE %LONG3, BL%LE %LONG4 */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x00000032
 	str r1, [r0]
 
 	/* chip1 Deselect */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x07100000
 	str r1, [r0]
 
 	/* chip1 PALL */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x01100000
 	str r1, [r0]
 
 	/* chip1 REFA */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x05100000
 	str r1, [r0]
 
 	/* chip1 REFA */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x05100000
 	str r1, [r0]
 
 	/* chip1 MRS, CL%LE %LONG3, BL%LE %LONG4 */
-	ldr r0, =0xe6000010
+	ldr r0, =S5P_DIRECTCMD				@ 0xe6000010
 	ldr r1, =0x00100032
 	str r1, [r0]
 
 	/* auto refresh on */
-	ldr r0, =0xe6000000
+	ldr r0, =S5P_CONCONTROL				@ 0xe6000000
 	ldr r1, =0xff002030
 	str r1, [r0]
 
 	/* PwrdnConfig */
-	ldr r0, =0xe6000028
+	ldr r0, =S5P_PWRDNCONFIG			@ 0xe6000028
 	ldr r1, =0x00100002
 	str r1, [r0]
 
 	/* BL%LE %LONG */
-	ldr r0, =0xe6000004
+	ldr r0, =S5P_MEMCONROL				@ 0xe6000004
 	ldr r1, =0xff212100
 	str r1, [r0]
 	mov	pc, lr
diff --git a/drivers/serial/s5pc100.c b/drivers/serial/s5pc100.c
index 17d138f..d777491 100644
--- a/drivers/serial/s5pc100.c
+++ b/drivers/serial/s5pc100.c
@@ -23,7 +23,7 @@
 
 #include <common.h>
 
-#include <s5pc100.h>
+#include <s5pc1xx.h>
 
 #ifdef CONFIG_SERIAL0
 #define UART_NR	S5PC1XX_UART0
-- 
2.7.4