From 63185b0a32442fe36fda3f6cb5b29d186085f179 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Fri, 6 Nov 2020 08:11:57 +0100 Subject: [PATCH] ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1 Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"), skeleton.dtsi file is no more included. This synchronization is needed to avoid to get 2 memory node in DTB file if, in DTS file, memory node is declared with the correct syntax as following: memory@90000000 { device_type = "memory"; reg = <0x90000000 0x800000>; }; Then in DTB, we will have the 2 memory nodes, which is incorrect and cause misbehavior during DT parsing by U-boot: memory { device_type = "memory"; reg = <0x00 0x00>; }; memory@90000000 { device_type = "memory"; reg = <0x90000000 0x800000>; }; Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1. When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize() API, first above memory node is found (with reg = <0x00 0x00>), so gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/armv7-m.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/dts/armv7-m.dtsi b/arch/arm/dts/armv7-m.dtsi index 31349da..26f5443 100644 --- a/arch/arm/dts/armv7-m.dtsi +++ b/arch/arm/dts/armv7-m.dtsi @@ -1,5 +1,4 @@ -#include "skeleton.dtsi" - +// SPDX-License-Identifier: GPL-2.0 / { nvic: interrupt-controller@e000e100 { compatible = "arm,armv7m-nvic"; @@ -22,4 +21,3 @@ ranges; }; }; - -- 2.7.4