From 6239d67001843722cb5d6e08d4368492fa5dbd9e Mon Sep 17 00:00:00 2001 From: Aditya Nandakumar Date: Thu, 11 Jun 2020 12:29:12 -0700 Subject: [PATCH] [GISel][NFC]: Add unit test for clarifying CSE behavior Add a unit test that shows how CSE works if we install an observer at the machine function level and not use the CSEMIRBuilder to build instructions. https://reviews.llvm.org/D81625 --- llvm/unittests/CodeGen/GlobalISel/CSETest.cpp | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp index 1c86d5f..556f4f2 100644 --- a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp +++ b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp @@ -77,6 +77,25 @@ TEST_F(AArch64GISelMITest, TestCSE) { auto Undef0 = CSEB.buildUndef(s32); auto Undef1 = CSEB.buildUndef(s32); EXPECT_EQ(&*Undef0, &*Undef1); + + // If the observer is installed to the MF, CSE can also + // track new instructions built without the CSEBuilder and + // the newly built instructions are available for CSEing next + // time a build call is made through the CSEMIRBuilder. + // Additionally, the CSE implementation lazily hashes instructions + // (every build call) to give chance for the instruction to be fully + // built (say using .addUse().addDef().. so on). + GISelObserverWrapper WrapperObserver(&CSEInfo); + RAIIMFObsDelInstaller Installer(*MF, WrapperObserver); + MachineIRBuilder RegularBuilder(*MF); + RegularBuilder.setInsertPt(*EntryMBB, EntryMBB->begin()); + auto NonCSEFMul = RegularBuilder.buildInstr(TargetOpcode::G_AND) + .addDef(MRI->createGenericVirtualRegister(s32)) + .addUse(Copies[0]) + .addUse(Copies[1]); + auto CSEFMul = + CSEB.buildInstr(TargetOpcode::G_AND, {s32}, {Copies[0], Copies[1]}); + EXPECT_EQ(&*CSEFMul, &*NonCSEFMul); } TEST_F(AArch64GISelMITest, TestCSEConstantConfig) { -- 2.7.4