From 62168ff831f4d42ce2efcfb144dafc8de87df865 Mon Sep 17 00:00:00 2001 From: "fschneider@chromium.org" Date: Wed, 11 Jan 2012 08:29:42 +0000 Subject: [PATCH] Tiny improvement of register constraints in LClassOfTest instructions. The input register does not need to be made writable. We already allocate enough temp registers and the input register will always be preserved. Review URL: http://codereview.chromium.org/9166007 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10379 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/arm/lithium-arm.cc | 2 +- src/arm/lithium-codegen-arm.cc | 6 ++++-- src/ia32/lithium-codegen-ia32.cc | 12 ++++-------- src/ia32/lithium-ia32.cc | 6 +++--- src/x64/lithium-codegen-x64.cc | 14 +++++++++----- src/x64/lithium-x64.cc | 2 +- 6 files changed, 22 insertions(+), 20 deletions(-) diff --git a/src/arm/lithium-arm.cc b/src/arm/lithium-arm.cc index 7b66311..81230cd 100644 --- a/src/arm/lithium-arm.cc +++ b/src/arm/lithium-arm.cc @@ -1543,7 +1543,7 @@ LInstruction* LChunkBuilder::DoHasCachedArrayIndexAndBranch( LInstruction* LChunkBuilder::DoClassOfTestAndBranch( HClassOfTestAndBranch* instr) { ASSERT(instr->value()->representation().IsTagged()); - return new LClassOfTestAndBranch(UseTempRegister(instr->value()), + return new LClassOfTestAndBranch(UseRegister(instr->value()), TempRegister()); } diff --git a/src/arm/lithium-codegen-arm.cc b/src/arm/lithium-codegen-arm.cc index e79caf1..1cd5fb5 100644 --- a/src/arm/lithium-codegen-arm.cc +++ b/src/arm/lithium-codegen-arm.cc @@ -1994,7 +1994,7 @@ void LCodeGen::DoHasCachedArrayIndexAndBranch( // Branches to a label or falls through with the answer in flags. Trashes -// the temp registers, but not the input. Only input and temp2 may alias. +// the temp registers, but not the input. void LCodeGen::EmitClassOfTest(Label* is_true, Label* is_false, Handleclass_name, @@ -2002,7 +2002,9 @@ void LCodeGen::EmitClassOfTest(Label* is_true, Register temp, Register temp2) { ASSERT(!input.is(temp)); - ASSERT(!temp.is(temp2)); // But input and temp2 may be the same register. + ASSERT(!input.is(temp2)); + ASSERT(!temp.is(temp2)); + __ JumpIfSmi(input, is_false); if (class_name->IsEqualTo(CStrVector("Function"))) { diff --git a/src/ia32/lithium-codegen-ia32.cc b/src/ia32/lithium-codegen-ia32.cc index edde934..aee5cf0 100644 --- a/src/ia32/lithium-codegen-ia32.cc +++ b/src/ia32/lithium-codegen-ia32.cc @@ -1831,7 +1831,7 @@ void LCodeGen::DoHasCachedArrayIndexAndBranch( // Branches to a label or falls through with the answer in the z flag. Trashes -// the temp registers, but not the input. Only input and temp2 may alias. +// the temp registers, but not the input. void LCodeGen::EmitClassOfTest(Label* is_true, Label* is_false, Handleclass_name, @@ -1839,7 +1839,8 @@ void LCodeGen::EmitClassOfTest(Label* is_true, Register temp, Register temp2) { ASSERT(!input.is(temp)); - ASSERT(!temp.is(temp2)); // But input and temp2 may be the same register. + ASSERT(!input.is(temp2)); + ASSERT(!temp.is(temp2)); __ JumpIfSmi(input, is_false); if (class_name->IsEqualTo(CStrVector("Function"))) { @@ -1899,12 +1900,7 @@ void LCodeGen::DoClassOfTestAndBranch(LClassOfTestAndBranch* instr) { Register input = ToRegister(instr->InputAt(0)); Register temp = ToRegister(instr->TempAt(0)); Register temp2 = ToRegister(instr->TempAt(1)); - if (input.is(temp)) { - // Swap. - Register swapper = temp; - temp = temp2; - temp2 = swapper; - } + Handle class_name = instr->hydrogen()->class_name(); int true_block = chunk_->LookupDestination(instr->true_block_id()); diff --git a/src/ia32/lithium-ia32.cc b/src/ia32/lithium-ia32.cc index 6ecb29f..9c2ff6f 100644 --- a/src/ia32/lithium-ia32.cc +++ b/src/ia32/lithium-ia32.cc @@ -1601,9 +1601,9 @@ LInstruction* LChunkBuilder::DoHasCachedArrayIndexAndBranch( LInstruction* LChunkBuilder::DoClassOfTestAndBranch( HClassOfTestAndBranch* instr) { ASSERT(instr->value()->representation().IsTagged()); - return new(zone()) LClassOfTestAndBranch(UseTempRegister(instr->value()), - TempRegister(), - TempRegister()); + return new(zone()) LClassOfTestAndBranch(UseRegister(instr->value()), + TempRegister(), + TempRegister()); } diff --git a/src/x64/lithium-codegen-x64.cc b/src/x64/lithium-codegen-x64.cc index bafe74e..113e98a 100644 --- a/src/x64/lithium-codegen-x64.cc +++ b/src/x64/lithium-codegen-x64.cc @@ -1755,13 +1755,17 @@ void LCodeGen::DoHasCachedArrayIndexAndBranch( // Branches to a label or falls through with the answer in the z flag. -// Trashes the temp register and possibly input (if it and temp are aliased). +// Trashes the temp register. void LCodeGen::EmitClassOfTest(Label* is_true, Label* is_false, Handle class_name, Register input, Register temp, - Register scratch) { + Register temp2) { + ASSERT(!input.is(temp)); + ASSERT(!input.is(temp2)); + ASSERT(!temp.is(temp2)); + __ JumpIfSmi(input, is_false); if (class_name->IsEqualTo(CStrVector("Function"))) { @@ -1782,9 +1786,9 @@ void LCodeGen::EmitClassOfTest(Label* is_true, // Faster code path to avoid two compares: subtract lower bound from the // actual type and do a signed compare with the width of the type range. __ movq(temp, FieldOperand(input, HeapObject::kMapOffset)); - __ movq(scratch, FieldOperand(temp, Map::kInstanceTypeOffset)); - __ subb(scratch, Immediate(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE)); - __ cmpb(scratch, + __ movq(temp2, FieldOperand(temp, Map::kInstanceTypeOffset)); + __ subb(temp2, Immediate(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE)); + __ cmpb(temp2, Immediate(static_cast(LAST_NONCALLABLE_SPEC_OBJECT_TYPE - FIRST_NONCALLABLE_SPEC_OBJECT_TYPE))); __ j(above, is_false); diff --git a/src/x64/lithium-x64.cc b/src/x64/lithium-x64.cc index d0a5a41..784b8d4 100644 --- a/src/x64/lithium-x64.cc +++ b/src/x64/lithium-x64.cc @@ -1538,7 +1538,7 @@ LInstruction* LChunkBuilder::DoHasCachedArrayIndexAndBranch( LInstruction* LChunkBuilder::DoClassOfTestAndBranch( HClassOfTestAndBranch* instr) { - return new LClassOfTestAndBranch(UseTempRegister(instr->value()), + return new LClassOfTestAndBranch(UseRegister(instr->value()), TempRegister(), TempRegister()); } -- 2.7.4