From 6045a804b94b423812b97c38c1d18136698de44d Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Wed, 13 May 2020 17:43:01 -0500 Subject: [PATCH] [Attributor] Check lines accidentally not committed with D76208 --- .../Transforms/Attributor/dereferenceable-1.ll | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/llvm/test/Transforms/Attributor/dereferenceable-1.ll b/llvm/test/Transforms/Attributor/dereferenceable-1.ll index 0b62dc8..dea81f9 100644 --- a/llvm/test/Transforms/Attributor/dereferenceable-1.ll +++ b/llvm/test/Transforms/Attributor/dereferenceable-1.ll @@ -300,6 +300,38 @@ define void @deref_or_null_and_nonnull(i32* dereferenceable_or_null(100) %0) { ; FIXME: %ptr should be dereferenceable(31) define void @test8(i8* %ptr) #0 { +; IS________OPM-LABEL: define {{[^@]+}}@test8 +; IS________OPM-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) +; IS________OPM-NEXT: br label [[TMP1:%.*]] +; IS________OPM: 1: +; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ] +; IS________OPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64 +; IS________OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]] +; IS________OPM-NEXT: store i8 32, i8* [[TMP3]], align 1 +; IS________OPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1 +; IS________OPM-NEXT: br label [[TMP5]] +; IS________OPM: 5: +; IS________OPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30 +; IS________OPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]] +; IS________OPM: 7: +; IS________OPM-NEXT: ret void +; +; IS________NPM-LABEL: define {{[^@]+}}@test8 +; IS________NPM-SAME: (i8* nocapture nofree nonnull writeonly dereferenceable(21) [[PTR:%.*]]) +; IS________NPM-NEXT: br label [[TMP1:%.*]] +; IS________NPM: 1: +; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ] +; IS________NPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64 +; IS________NPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]] +; IS________NPM-NEXT: store i8 32, i8* [[TMP3]], align 1 +; IS________NPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1 +; IS________NPM-NEXT: br label [[TMP5]] +; IS________NPM: 5: +; IS________NPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30 +; IS________NPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]] +; IS________NPM: 7: +; IS________NPM-NEXT: ret void +; br label %1 1: ; preds = %5, %0 %i.0 = phi i32 [ 20, %0 ], [ %4, %5 ] @@ -318,6 +350,13 @@ define void @test8(i8* %ptr) #0 { ; 8.2 (negative case) define void @test8_neg(i32 %i, i8* %ptr) #0 { +; CHECK-LABEL: define {{[^@]+}}@test8_neg +; CHECK-SAME: (i32 [[I:%.*]], i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) +; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I]] to i64 +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP1]] +; CHECK-NEXT: store i8 65, i8* [[TMP2]], align 1 +; CHECK-NEXT: ret void +; %1 = sext i32 %i to i64 %2 = getelementptr inbounds i8, i8* %ptr, i64 %1 store i8 65, i8* %2, align 1 -- 2.7.4