From 6019cbf9dfe5893283b9df86613cf1afddc7e344 Mon Sep 17 00:00:00 2001 From: "balazs.kilvady" Date: Mon, 2 Feb 2015 09:50:10 -0800 Subject: [PATCH] MIPS64: Megamorphic KeyedLoadIC needs special handling for vector ics. Port 16843e239d95f5e8eaaa06d2a0a6e371298fe11f Original commit message: When --vector-ics is true, we still tail-call to the hand-written megamorphic KeyedLoadIC (formerly "generic"). Now that this code uses the megamorphic cache, it needs to deal properly with the vector and slot registers. Achieve this with a sentinel vectors/slot combo. BUG= Review URL: https://codereview.chromium.org/894053002 Cr-Commit-Position: refs/heads/master@{#26384} --- src/ic/mips64/ic-mips64.cc | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/ic/mips64/ic-mips64.cc b/src/ic/mips64/ic-mips64.cc index 1c5efff..aec4299 100644 --- a/src/ic/mips64/ic-mips64.cc +++ b/src/ic/mips64/ic-mips64.cc @@ -534,10 +534,24 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) { __ LoadRoot(at, Heap::kHashTableMapRootIndex); __ Branch(&probe_dictionary, eq, a4, Operand(at)); + if (FLAG_vector_ics) { + // When vector ics are in use, the handlers in the stub cache expect a + // vector and slot. Since we won't change the IC from any downstream + // misses, a dummy vector can be used. + Register vector = VectorLoadICDescriptor::VectorRegister(); + Register slot = VectorLoadICDescriptor::SlotRegister(); + DCHECK(!AreAliased(vector, slot, a4, a5, a6, t1)); + Handle dummy_vector = Handle::cast( + masm->isolate()->factory()->keyed_load_dummy_vector()); + int int_slot = dummy_vector->GetIndex(FeedbackVectorICSlot(0)); + __ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex); + __ li(slot, Operand(Smi::FromInt(int_slot))); + } + Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( Code::ComputeHandlerFlags(Code::LOAD_IC)); masm->isolate()->stub_cache()->GenerateProbe( - masm, Code::LOAD_IC, flags, false, receiver, key, a3, a4, a5, a6); + masm, Code::LOAD_IC, flags, false, receiver, key, a4, a5, a6, t1); // Cache miss. GenerateMiss(masm); -- 2.7.4