From 5ff42a85f583f872433550aedea8e527a3e896d1 Mon Sep 17 00:00:00 2001 From: Guillaume Emont Date: Thu, 13 Dec 2012 17:46:59 +0100 Subject: [PATCH] mips: convsbw: spread bytes when we have an instruction shift --- orc/orcrules-mips.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/orc/orcrules-mips.c b/orc/orcrules-mips.c index 65ec982..143b23d 100644 --- a/orc/orcrules-mips.c +++ b/orc/orcrules-mips.c @@ -281,8 +281,14 @@ mips_rule_convsbw (OrcCompiler *compiler, void *user, OrcInstruction *insn) /* left shift 8 bits, then right shift signed 8 bits, so that the sign bit * gets replicated in the upper 8 bits */ - orc_mips_emit_shll_ph (compiler, dest, src, 8); - orc_mips_emit_shra_ph (compiler, dest, dest, 8); + if (compiler->insn_shift > 0) { + orc_mips_emit_preceu_ph_qbr (compiler, dest, src); + orc_mips_emit_shll_ph (compiler, dest, dest, 8); + orc_mips_emit_shra_ph (compiler, dest, dest, 8); + } else { + orc_mips_emit_shll_ph (compiler, dest, src, 8); + orc_mips_emit_shra_ph (compiler, dest, dest, 8); + } } void -- 2.7.4