From 5fd152bae8a765024231a7390ae48752b579a5a9 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Tue, 1 Mar 2016 17:31:21 -0500 Subject: [PATCH] freedreno/ir3: add dev ptr to ir3_compiler And use this for allocating bo's to hold the shader binary, rather than accessing the dev via ctx ptr. One step towards making shaders sharable across contexts. Signed-off-by: Rob Clark --- src/gallium/drivers/freedreno/a3xx/fd3_screen.c | 2 +- src/gallium/drivers/freedreno/a4xx/fd4_screen.c | 2 +- src/gallium/drivers/freedreno/ir3/ir3_cmdline.c | 2 +- src/gallium/drivers/freedreno/ir3/ir3_compiler.c | 3 ++- src/gallium/drivers/freedreno/ir3/ir3_compiler.h | 3 ++- src/gallium/drivers/freedreno/ir3/ir3_shader.c | 6 +++--- 6 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_screen.c b/src/gallium/drivers/freedreno/a3xx/fd3_screen.c index 722fe36..4aea2fe 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_screen.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_screen.c @@ -106,7 +106,7 @@ fd3_screen_init(struct pipe_screen *pscreen) { struct fd_screen *screen = fd_screen(pscreen); screen->max_rts = A3XX_MAX_RENDER_TARGETS; - screen->compiler = ir3_compiler_create(screen->gpu_id); + screen->compiler = ir3_compiler_create(screen->dev, screen->gpu_id); pscreen->context_create = fd3_context_create; pscreen->is_format_supported = fd3_screen_is_format_supported; } diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_screen.c b/src/gallium/drivers/freedreno/a4xx/fd4_screen.c index b2a69cc..c193f36 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_screen.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_screen.c @@ -105,7 +105,7 @@ fd4_screen_init(struct pipe_screen *pscreen) { struct fd_screen *screen = fd_screen(pscreen); screen->max_rts = A4XX_MAX_RENDER_TARGETS; - screen->compiler = ir3_compiler_create(screen->gpu_id); + screen->compiler = ir3_compiler_create(screen->dev, screen->gpu_id); pscreen->context_create = fd4_context_create; pscreen->is_format_supported = fd4_screen_is_format_supported; } diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c index 481859e..7ae4e94 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c @@ -233,7 +233,7 @@ int main(int argc, char **argv) tgsi_dump(toks, 0); nir_shader *nir = ir3_tgsi_to_nir(toks); - s.compiler = ir3_compiler_create(gpu_id); + s.compiler = ir3_compiler_create(NULL, gpu_id); s.nir = ir3_optimize_nir(&s, nir, NULL); v.key = key; diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c index 7c8eccb..37ad733 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c @@ -30,9 +30,10 @@ #include "ir3_compiler.h" -struct ir3_compiler * ir3_compiler_create(uint32_t gpu_id) +struct ir3_compiler * ir3_compiler_create(struct fd_device *dev, uint32_t gpu_id) { struct ir3_compiler *compiler = rzalloc(NULL, struct ir3_compiler); + compiler->dev = dev; compiler->gpu_id = gpu_id; compiler->set = ir3_ra_alloc_reg_set(compiler); return compiler; diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.h b/src/gallium/drivers/freedreno/ir3/ir3_compiler.h index 697afeb..0ad689c 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.h +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.h @@ -34,12 +34,13 @@ struct ir3_ra_reg_set; struct ir3_compiler { + struct fd_device *dev; uint32_t gpu_id; struct ir3_ra_reg_set *set; uint32_t shader_count; }; -struct ir3_compiler * ir3_compiler_create(uint32_t gpu_id); +struct ir3_compiler * ir3_compiler_create(struct fd_device *dev, uint32_t gpu_id); void ir3_compiler_destroy(struct ir3_compiler *compiler); int ir3_compile_shader_nir(struct ir3_compiler *compiler, diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c index 7d17f42..2610607 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c @@ -127,14 +127,14 @@ void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id) static void assemble_variant(struct ir3_shader_variant *v) { - struct fd_context *ctx = fd_context(v->shader->pctx); - uint32_t gpu_id = v->shader->compiler->gpu_id; + struct ir3_compiler *compiler = v->shader->compiler; + uint32_t gpu_id = compiler->gpu_id; uint32_t sz, *bin; bin = ir3_shader_assemble(v, gpu_id); sz = v->info.sizedwords * 4; - v->bo = fd_bo_new(ctx->dev, sz, + v->bo = fd_bo_new(compiler->dev, sz, DRM_FREEDRENO_GEM_CACHE_WCOMBINE | DRM_FREEDRENO_GEM_TYPE_KMEM); -- 2.7.4