From 5f7c38549869e15f898482a398fd4fb3ea44c6fe Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Mon, 18 Apr 2022 16:45:25 -0400 Subject: [PATCH] [InstCombine] add tests for freeze of partial undef vector constants; NFC --- llvm/test/Transforms/InstCombine/freeze.ll | 13 +++++++++++-- llvm/test/Transforms/InstCombine/select.ll | 22 ++++++++++++++++++++++ 2 files changed, 33 insertions(+), 2 deletions(-) diff --git a/llvm/test/Transforms/InstCombine/freeze.ll b/llvm/test/Transforms/InstCombine/freeze.ll index 9f2c47c..3fee57a 100644 --- a/llvm/test/Transforms/InstCombine/freeze.ll +++ b/llvm/test/Transforms/InstCombine/freeze.ll @@ -87,6 +87,15 @@ define void @or_select_multipleuses_logical(i32 %x, i1 %y) { ret void } +define <3 x i4> @partial_undef_vec() { +; CHECK-LABEL: @partial_undef_vec( +; CHECK-NEXT: [[F:%.*]] = freeze <3 x i4> +; CHECK-NEXT: ret <3 x i4> [[F]] +; + %f = freeze <3 x i4> + ret <3 x i4> %f +} + ; Move the freeze forward to prevent poison from spreading. define i32 @early_freeze_test1(i32 %x, i32 %y) { @@ -267,8 +276,8 @@ define i32 @propagate_drop_flags_mul(i32 %arg) { define i32 @propagate_drop_flags_udiv(i32 %arg) { ; CHECK-LABEL: @propagate_drop_flags_udiv( ; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] -; CHECK-NEXT: [[V1:%.*]] = lshr i32 [[ARG_FR]], 1 -; CHECK-NEXT: ret i32 [[V1]] +; CHECK-NEXT: [[V11:%.*]] = lshr i32 [[ARG_FR]], 1 +; CHECK-NEXT: ret i32 [[V11]] ; %v1 = udiv exact i32 %arg, 2 %v1.fr = freeze i32 %v1 diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll index 1705913..e68c8e5 100644 --- a/llvm/test/Transforms/InstCombine/select.ll +++ b/llvm/test/Transforms/InstCombine/select.ll @@ -2642,6 +2642,28 @@ define <2 x i8> @partial_cond_freeze_constant_true_val_vec(<2 x i8> %x) { ret <2 x i8> %s } +define <2 x i8> @partial_cond_freeze_constant_false_val_vec(<2 x i8> %x) { +; CHECK-LABEL: @partial_cond_freeze_constant_false_val_vec( +; CHECK-NEXT: [[COND_FR:%.*]] = freeze <2 x i1> +; CHECK-NEXT: [[S:%.*]] = select <2 x i1> [[COND_FR]], <2 x i8> [[X:%.*]], <2 x i8> +; CHECK-NEXT: ret <2 x i8> [[S]] +; + %cond.fr = freeze <2 x i1> + %s = select <2 x i1> %cond.fr, <2 x i8> %x, <2 x i8> + ret <2 x i8> %s +} + +define <2 x i8> @partial_cond_freeze_both_arms_constant_vec() { +; CHECK-LABEL: @partial_cond_freeze_both_arms_constant_vec( +; CHECK-NEXT: [[COND_FR:%.*]] = freeze <2 x i1> +; CHECK-NEXT: [[S:%.*]] = select <2 x i1> [[COND_FR]], <2 x i8> , <2 x i8> +; CHECK-NEXT: ret <2 x i8> [[S]] +; + %cond.fr = freeze <2 x i1> + %s = select <2 x i1> %cond.fr, <2 x i8> , <2 x i8> + ret <2 x i8> %s +} + declare void @foo2(i8, i8) define void @cond_freeze_multipleuses(i8 %x, i8 %y) { -- 2.7.4