From 5ee625bf6b5ee6dcbe4b3eea4d41894a35b58fa8 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Tue, 23 Nov 2021 11:33:10 +0000 Subject: [PATCH] [AMDGPU] Fix the name of a test case --- llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/test/CodeGen/AMDGPU/llvm.mulo.ll b/llvm/test/CodeGen/AMDGPU/llvm.mulo.ll index 40ece53..7e00cb5 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.mulo.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.mulo.ll @@ -78,8 +78,8 @@ bb: ret { i64, i1 } %umulo } -define { i64, i1 } @smulo_i64_s_s(i64 %x, i64 %y) { -; SI-LABEL: smulo_i64_s_s: +define { i64, i1 } @smulo_i64_v_v(i64 %x, i64 %y) { +; SI-LABEL: smulo_i64_v_v: ; SI: ; %bb.0: ; %bb ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_mul_hi_u32 v6, v1, v2 @@ -116,7 +116,7 @@ define { i64, i1 } @smulo_i64_s_s(i64 %x, i64 %y) { ; SI-NEXT: v_mov_b32_e32 v1, v5 ; SI-NEXT: s_setpc_b64 s[30:31] ; -; GFX9-LABEL: smulo_i64_s_s: +; GFX9-LABEL: smulo_i64_v_v: ; GFX9: ; %bb.0: ; %bb ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_mul_lo_u32 v5, v0, v3 @@ -151,7 +151,7 @@ define { i64, i1 } @smulo_i64_s_s(i64 %x, i64 %y) { ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: s_setpc_b64 s[30:31] ; -; GFX10-LABEL: smulo_i64_s_s: +; GFX10-LABEL: smulo_i64_v_v: ; GFX10: ; %bb.0: ; %bb ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 -- 2.7.4