From 5e4df2848d5b0cfa8bedd9ef540e85cd33ff8f3b Mon Sep 17 00:00:00 2001 From: Adhemerval Zanella Date: Mon, 3 Nov 2014 07:26:33 -0500 Subject: [PATCH] powerpc: Fix encoding of POWER8 instruction This patch adds a binary encoding for 'mtvsrd' instruction to avoid build failures when assembler does not support POWER8. --- ChangeLog | 5 +++++ sysdeps/powerpc/powerpc64/power8/memset.S | 9 ++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/ChangeLog b/ChangeLog index ddcb443..aabcd62 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2014-11-03 Adhemerval Zanella + + * sysdeps/powerpc/powerpc64/power8/memset.S (MTVSRD_V1_R4): Encode + mtvsrd instruction in binary form. + 2014-11-03 Andreas Schwab [BZ #17522] diff --git a/sysdeps/powerpc/powerpc64/power8/memset.S b/sysdeps/powerpc/powerpc64/power8/memset.S index 191a4df..cebcbdf 100644 --- a/sysdeps/powerpc/powerpc64/power8/memset.S +++ b/sysdeps/powerpc/powerpc64/power8/memset.S @@ -17,6 +17,13 @@ . */ #include +#include + +#if __BYTE_ORDER == __LITTLE_ENDIAN +#define MTVSRD_V1_R4 .byte 0x66,0x01,0x24,0x7c /* mtvsrd v1,r4 */ +#else +#define MTVSRD_V1_R4 .byte 0x7c,0x24,0x01,0x66 +#endif /* __ptr_t [r3] memset (__ptr_t s [r3], int c [r4], size_t n [r5])); Returns 's'. */ @@ -142,7 +149,7 @@ L(tail_bytes): vector instruction to achieve best throughput. */ L(huge_vector): /* Replicate set byte to quadword in VMX register. */ - mtvsrd v1,r4 + MTVSRD_V1_R4 xxpermdi 32,v0,v1,0 vspltb v2,v0,15 -- 2.7.4