From 5dc7911e0667bee8c5f2ec88327bc41605d2293e Mon Sep 17 00:00:00 2001 From: Richard Guenther Date: Wed, 29 Apr 2009 18:07:23 +0000 Subject: [PATCH] re PR middle-end/39943 (wrong conversion from unsigned int to float) 2009-04-29 Richard Guenther PR target/39943 * config/i386/i386.c (ix86_vectorize_builtin_conversion): Only allow conversion to signed integers. * lib/target-supports.exp (check_effective_target_vect_uintfloat_cvt): New. (check_effective_target_vect_floatuint_cvt): Likewise. * gcc.dg/vect/slp-10.c: Adjust. * gcc.dg/vect/slp-11.c: Adjust. * gcc.dg/vect/slp-12b.c: Adjust. * gcc.dg/vect/slp-33.c: Adjust. * gcc.c-torture/compile/pr39943.c: New testcase. From-SVN: r146984 --- gcc/ChangeLog | 6 ++++ gcc/config/i386/i386.c | 4 ++- gcc/testsuite/ChangeLog | 12 +++++++ gcc/testsuite/gcc.c-torture/compile/pr39943.c | 7 +++++ gcc/testsuite/gcc.dg/vect/slp-10.c | 12 +++---- gcc/testsuite/gcc.dg/vect/slp-11.c | 4 +-- gcc/testsuite/gcc.dg/vect/slp-12b.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-33.c | 12 +++---- gcc/testsuite/lib/target-supports.exp | 45 +++++++++++++++++++++++++-- 9 files changed, 86 insertions(+), 18 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr39943.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3795ef4..c7a97dd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2009-04-29 Richard Guenther + PR target/39943 + * config/i386/i386.c (ix86_vectorize_builtin_conversion): Only + allow conversion to signed integers. + +2009-04-29 Richard Guenther + * tree-cfg.c (verify_gimple_assign_binary): Allow vector shifts of floating point vectors if the shift amount is a constant multiple of the element size. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 650325a..5e7689b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -25639,7 +25639,9 @@ ix86_veclibabi_acml (enum built_in_function fn, tree type_out, tree type_in) static tree ix86_vectorize_builtin_conversion (unsigned int code, tree type) { - if (TREE_CODE (type) != VECTOR_TYPE) + if (TREE_CODE (type) != VECTOR_TYPE + /* There are only conversions from/to signed integers. */ + || TYPE_UNSIGNED (TREE_TYPE (type))) return NULL_TREE; switch (code) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index beb916f..4c28af6 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,17 @@ 2009-04-29 Richard Guenther + PR target/39943 + * lib/target-supports.exp (check_effective_target_vect_uintfloat_cvt): + New. + (check_effective_target_vect_floatuint_cvt): Likewise. + * gcc.dg/vect/slp-10.c: Adjust. + * gcc.dg/vect/slp-11.c: Adjust. + * gcc.dg/vect/slp-12b.c: Adjust. + * gcc.dg/vect/slp-33.c: Adjust. + * gcc.c-torture/compile/pr39943.c: New testcase. + +2009-04-29 Richard Guenther + PR middle-end/39937 * gcc.c-torture/compile/pr39937.c: New testcase. diff --git a/gcc/testsuite/gcc.c-torture/compile/pr39943.c b/gcc/testsuite/gcc.c-torture/compile/pr39943.c new file mode 100644 index 0000000..537ba43 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr39943.c @@ -0,0 +1,7 @@ +void gl_fog_index_pixels(float f, unsigned int n, unsigned int index[]) +{ + unsigned int i; + for (i=0; i #include diff --git a/gcc/testsuite/gcc.dg/vect/slp-33.c b/gcc/testsuite/gcc.dg/vect/slp-33.c index 7ee7a0b..288c748 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-33.c +++ b/gcc/testsuite/gcc.dg/vect/slp-33.c @@ -102,11 +102,11 @@ int main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" {target {vect_intfloat_cvt && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" {target {{! { vect_intfloat_cvt}} && {! {vect_int_mult}}} } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_intfloat_cvt && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" {target {{! { vect_intfloat_cvt}} && {! {vect_int_mult}}} } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" {target {{! { vect_uintfloat_cvt}} && {! {vect_int_mult}}} } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" {target {{! { vect_uintfloat_cvt}} && {! {vect_int_mult}}} } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index a46f9b4..92bde78 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1338,7 +1338,7 @@ proc check_effective_target_vect_int { } { return $et_vect_int_saved } -# Return 1 if the target supports int->float conversion +# Return 1 if the target supports signed int->float conversion # proc check_effective_target_vect_intfloat_cvt { } { @@ -1361,7 +1361,28 @@ proc check_effective_target_vect_intfloat_cvt { } { } -# Return 1 if the target supports float->int conversion +# Return 1 if the target supports unsigned int->float conversion +# + +proc check_effective_target_vect_uintfloat_cvt { } { + global et_vect_uintfloat_cvt_saved + + if [info exists et_vect_uintfloat_cvt_saved] { + verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2 + } else { + set et_vect_uintfloat_cvt_saved 0 + if { ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) } { + set et_vect_uintfloat_cvt_saved 1 + } + } + + verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2 + return $et_vect_uintfloat_cvt_saved +} + + +# Return 1 if the target supports signed float->int conversion # proc check_effective_target_vect_floatint_cvt { } { @@ -1383,6 +1404,26 @@ proc check_effective_target_vect_floatint_cvt { } { return $et_vect_floatint_cvt_saved } +# Return 1 if the target supports unsigned float->int conversion +# + +proc check_effective_target_vect_floatuint_cvt { } { + global et_vect_floatuint_cvt_saved + + if [info exists et_vect_floatuint_cvt_saved] { + verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2 + } else { + set et_vect_floatuint_cvt_saved 0 + if { ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) } { + set et_vect_floatuint_cvt_saved 1 + } + } + + verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2 + return $et_vect_floatuint_cvt_saved +} + # Return 1 is this is an arm target using 32-bit instructions proc check_effective_target_arm32 { } { return [check_no_compiler_messages arm32 assembly { -- 2.7.4