From 5da0095e3a670fe61a3421a2a826514a61a687e0 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Mon, 24 Jun 2019 15:50:49 +0200 Subject: [PATCH] clk: sandbox: Adjust clk-mux.c to emulate reading divider value from HW The generic mux clock code for CCF requires reading the clock multiplexer value from HW registers. As sandbox by design has readl() as no-op it was necessary to provide this value in the other way. The new field in the mux structure (accessible only when sandbox is run) has been introduced for this purpose. Signed-off-by: Lukasz Majewski --- drivers/clk/clk-mux.c | 10 +++++++++- include/linux/clk-provider.h | 4 ++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 14b9f2b..3c075aa 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -64,7 +64,12 @@ static u8 clk_mux_get_parent(struct clk *clk) struct clk_mux *mux = to_clk_mux(clk); u32 val; - val = readl(mux->reg) >> mux->shift; +#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) + val = mux->io_mux_val; +#else + val = readl(mux->reg); +#endif + val >>= mux->shift; val &= mux->mask; return clk_mux_val_to_index(clk, mux->table, mux->flags, val); @@ -108,6 +113,9 @@ struct clk *clk_hw_register_mux_table(struct device *dev, const char *name, mux->mask = mask; mux->flags = clk_mux_flags; mux->table = table; +#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) + mux->io_mux_val = *(u32 *)reg; +#endif clk = &mux->clk; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 53c9c41..43a25e9 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -59,6 +59,10 @@ struct clk_mux { */ const char * const *parent_names; u8 num_parents; +#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) + u32 io_mux_val; +#endif + }; #define to_clk_mux(_clk) container_of(_clk, struct clk_mux, clk) -- 2.7.4