From 5d8186ac1a22afbaa6ed68e0fb67d1f150f798cb Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 3 Jul 2013 14:12:41 -0700 Subject: [PATCH] i965: Move intel_context::hw_ctx to brw_context. Signed-off-by: Kenneth Graunke Acked-by: Chris Forbes Acked-by: Paul Berry Acked-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_context.c | 4 ++-- src/mesa/drivers/dri/i965/brw_context.h | 2 ++ src/mesa/drivers/dri/i965/brw_queryobj.c | 5 ++--- src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +- src/mesa/drivers/dri/i965/brw_vtbl.c | 5 ++--- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 4 ++-- src/mesa/drivers/dri/i965/intel_context.h | 2 -- 7 files changed, 11 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 0b3dc35..d170b24 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -321,9 +321,9 @@ brwCreateContext(int api, * This is required for transform feedback buffer offsets, query objects, * and also allows us to reduce how much state we have to emit. */ - intel->hw_ctx = drm_intel_gem_context_create(brw->bufmgr); + brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr); - if (!intel->hw_ctx) { + if (!brw->hw_ctx) { fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n"); ralloc_free(brw); return false; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index c2ace5d..414a009 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -804,6 +804,8 @@ struct brw_context dri_bufmgr *bufmgr; + drm_intel_context *hw_ctx; + /** * Set if rendering has occured to the drawable's front buffer. * diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index 9d6ec2c..8165320 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -467,7 +467,7 @@ brw_emit_query_begin(struct brw_context *brw) struct gl_context *ctx = &intel->ctx; struct brw_query_object *query = brw->query.obj; - if (intel->hw_ctx) + if (brw->hw_ctx) return; /* Skip if we're not doing any queries, or we've already recorded the @@ -492,10 +492,9 @@ brw_emit_query_begin(struct brw_context *brw) void brw_emit_query_end(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; struct brw_query_object *query = brw->query.obj; - if (intel->hw_ctx) + if (brw->hw_ctx) return; if (!brw->query.begin_emitted) diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 2adf203..bdb2862 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -243,7 +243,7 @@ brw_upload_initial_gpu_state(struct brw_context *brw) * right away rather than doing it via state atoms. This saves a small * amount of overhead on every draw call. */ - if (!intel->hw_ctx) + if (!brw->hw_ctx) return; brw_upload_invariant_state(brw); diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index a4b8ed3..d19ca0b 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -69,7 +69,6 @@ dri_bo_release(drm_intel_bo **bo) static void brw_destroy_context(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { /* Force a report. */ brw->shader_time.report_time = 0; @@ -88,7 +87,7 @@ brw_destroy_context(struct brw_context *brw) free(brw->curbe.last_buf); free(brw->curbe.next_buf); - drm_intel_gem_context_destroy(intel->hw_ctx); + drm_intel_gem_context_destroy(brw->hw_ctx); } /** @@ -126,7 +125,7 @@ brw_new_batch(struct brw_context *brw) * would otherwise be stored in the context (which for all intents and * purposes means everything). */ - if (intel->hw_ctx == NULL) + if (brw->hw_ctx == NULL) brw->state.dirty.brw |= BRW_NEW_CONTEXT; brw->state.dirty.brw |= BRW_NEW_BATCH; diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index ed97859..70a1270 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -213,11 +213,11 @@ do_flush_locked(struct brw_context *brw) if (ret == 0) { if (unlikely(INTEL_DEBUG & DEBUG_AUB)) brw_annotate_aub(brw); - if (intel->hw_ctx == NULL || batch->is_blit) { + if (brw->hw_ctx == NULL || batch->is_blit) { ret = drm_intel_bo_mrb_exec(batch->bo, 4 * batch->used, NULL, 0, 0, flags); } else { - ret = drm_intel_gem_bo_context_exec(batch->bo, intel->hw_ctx, + ret = drm_intel_gem_bo_context_exec(batch->bo, brw->hw_ctx, 4 * batch->used, flags); } } diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h index 50b9c03..4ca5081 100644 --- a/src/mesa/drivers/dri/i965/intel_context.h +++ b/src/mesa/drivers/dri/i965/intel_context.h @@ -129,8 +129,6 @@ struct intel_context bool has_llc; bool has_swizzling; - drm_intel_context *hw_ctx; - struct intel_batchbuffer batch; drm_intel_bo *first_post_swapbuffers_batch; -- 2.7.4