From 5d52f8c9f62c87909c62aa35a7db37a551951b8d Mon Sep 17 00:00:00 2001 From: Tanner Gooding Date: Sat, 2 Jun 2018 08:02:29 -0700 Subject: [PATCH] Moving the xarch HWIntrtinsicInfo type into its own header file. --- src/jit/codegenarm64.cpp | 2 +- src/jit/compiler.h | 1 + src/jit/hwintrinsic.h | 14 +++++ src/jit/hwintrinsicArm64.cpp | 2 +- src/jit/hwintrinsicxarch.cpp | 14 +---- src/jit/hwintrinsicxarch.h | 143 +++++++++++++++++++++++++++++++++++++++++++ src/jit/lowerarmarch.cpp | 2 +- src/jit/lsraarm64.cpp | 2 +- src/jit/namedintrinsiclist.h | 121 ------------------------------------ 9 files changed, 163 insertions(+), 138 deletions(-) create mode 100644 src/jit/hwintrinsic.h create mode 100644 src/jit/hwintrinsicxarch.h diff --git a/src/jit/codegenarm64.cpp b/src/jit/codegenarm64.cpp index 400c550..9441051 100644 --- a/src/jit/codegenarm64.cpp +++ b/src/jit/codegenarm64.cpp @@ -4890,7 +4890,7 @@ void CodeGen::genStoreLclTypeSIMD12(GenTree* treeNode) #endif // FEATURE_SIMD #ifdef FEATURE_HW_INTRINSICS -#include "hwintrinsicArm64.h" +#include "hwintrinsic.h" instruction CodeGen::getOpForHWIntrinsic(GenTreeHWIntrinsic* node, var_types instrType) { diff --git a/src/jit/compiler.h b/src/jit/compiler.h index 516790e..ed50fb3 100644 --- a/src/jit/compiler.h +++ b/src/jit/compiler.h @@ -59,6 +59,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX #include "emit.h" +#include "hwintrinsic.h" #include "simd.h" // This is only used locally in the JIT to indicate that diff --git a/src/jit/hwintrinsic.h b/src/jit/hwintrinsic.h new file mode 100644 index 0000000..fc8c640 --- /dev/null +++ b/src/jit/hwintrinsic.h @@ -0,0 +1,14 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. +// See the LICENSE file in the project root for more information. + +#ifndef _HW_INTRINSIC_H_ +#define _HW_INTRINSIC_H_ + +#if defined(_TARGET_XARCH_) +#include "hwintrinsicxarch.h" +#elif defined(_TARGET_ARM64_) +#include "hwintrinsicArm64.h" +#endif + +#endif // _HW_INTRINSIC_H_ diff --git a/src/jit/hwintrinsicArm64.cpp b/src/jit/hwintrinsicArm64.cpp index adf01e2..0a8130e 100644 --- a/src/jit/hwintrinsicArm64.cpp +++ b/src/jit/hwintrinsicArm64.cpp @@ -3,7 +3,7 @@ // See the LICENSE file in the project root for more information. #include "jitpch.h" -#include "hwintrinsicArm64.h" +#include "hwintrinsic.h" #ifdef FEATURE_HW_INTRINSICS diff --git a/src/jit/hwintrinsicxarch.cpp b/src/jit/hwintrinsicxarch.cpp index d3cdbb3..48b2d67 100644 --- a/src/jit/hwintrinsicxarch.cpp +++ b/src/jit/hwintrinsicxarch.cpp @@ -3,22 +3,10 @@ // See the LICENSE file in the project root for more information. #include "jitpch.h" +#include "hwintrinsic.h" #ifdef FEATURE_HW_INTRINSICS -struct HWIntrinsicInfo -{ - NamedIntrinsic intrinsicID; - const char* intrinsicName; - InstructionSet isa; - int ival; - unsigned simdSize; - int numArgs; - instruction ins[10]; - HWIntrinsicCategory category; - HWIntrinsicFlag flags; -}; - static const HWIntrinsicInfo hwIntrinsicInfoArray[] = { // clang-format off #define HARDWARE_INTRINSIC(id, name, isa, ival, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, flag) \ diff --git a/src/jit/hwintrinsicxarch.h b/src/jit/hwintrinsicxarch.h new file mode 100644 index 0000000..17f5fa8 --- /dev/null +++ b/src/jit/hwintrinsicxarch.h @@ -0,0 +1,143 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. +// See the LICENSE file in the project root for more information. + +#ifndef _HW_INTRINSIC_XARCH_H_ +#define _HW_INTRINSIC_XARCH_H_ + +#ifdef FEATURE_HW_INTRINSICS + +enum HWIntrinsicCategory : unsigned int +{ + // Simple SIMD intrinsics + // - take Vector128/256 parameters + // - return a Vector128/256 + // - the codegen of overloads can be determined by intrinsicID and base type of returned vector + HW_Category_SimpleSIMD, + + // IsSupported Property + // - each ISA class has an "IsSupported" property + HW_Category_IsSupportedProperty, + + // IMM intrinsics + // - some SIMD intrinsics requires immediate value (i.e. imm8) to generate instruction + HW_Category_IMM, + + // Scalar intrinsics + // - operate over general purpose registers, like crc32, lzcnt, popcnt, etc. + HW_Category_Scalar, + + // SIMD scalar + // - operate over vector registers(XMM), but just compute on the first element + HW_Category_SIMDScalar, + + // Memory access intrinsics + // - e.g., Avx.Load, Avx.Store, Sse.LoadAligned + HW_Category_MemoryLoad, + HW_Category_MemoryStore, + + // Helper intrinsics + // - do not directly correspond to a instruction, such as Avx.SetAllVector256 + HW_Category_Helper, + + // Special intrinsics + // - have to be addressed specially + HW_Category_Special +}; + +enum HWIntrinsicFlag : unsigned int +{ + HW_Flag_NoFlag = 0, + + // Commutative + // - if a binary-op intrinsic is commutative (e.g., Add, Multiply), its op1 can be contained + HW_Flag_Commutative = 0x1, + + // Full range IMM intrinsic + // - the immediate value is valid on the full range of imm8 (0-255) + HW_Flag_FullRangeIMM = 0x2, + + // Generic + // - must throw NotSupportException if the type argument is not numeric type + HW_Flag_OneTypeGeneric = 0x4, + // Two-type Generic + // - the intrinsic has two type parameters + HW_Flag_TwoTypeGeneric = 0x8, + + // NoCodeGen + // - should be transformed in the compiler front-end, cannot reach CodeGen + HW_Flag_NoCodeGen = 0x10, + + // Unfixed SIMD-size + // - overloaded on multiple vector sizes (SIMD size in the table is unreliable) + HW_Flag_UnfixedSIMDSize = 0x20, + + // Complex overload + // - the codegen of overloads cannot be determined by intrinsicID and base type + HW_Flag_ComplexOverloads = 0x40, + + // Multi-instruction + // - that one intrinsic can generate multiple instructions + HW_Flag_MultiIns = 0x80, + + // NoContainment + // the intrinsic cannot be contained + HW_Flag_NoContainment = 0x100, + + // Copy Upper bits + // some SIMD scalar intrinsics need the semantics of copying upper bits from the source operand + HW_Flag_CopyUpperBits = 0x200, + + // Select base type using the first argument type + HW_Flag_BaseTypeFromFirstArg = 0x400, + + // Indicates compFloatingPointUsed does not need to be set. + HW_Flag_NoFloatingPointUsed = 0x800, + + // Maybe IMM + // the intrinsic has either imm or Vector overloads + HW_Flag_MaybeIMM = 0x1000, + + // NoJmpTable IMM + // the imm intrinsic does not need jumptable fallback when it gets non-const argument + HW_Flag_NoJmpTableIMM = 0x2000, + + // 64-bit intrinsics + // Intrinsics that operate over 64-bit general purpose registers are not supported on 32-bit platform + HW_Flag_64BitOnly = 0x4000, + HW_Flag_SecondArgMaybe64Bit = 0x8000, + + // Select base type using the second argument type + HW_Flag_BaseTypeFromSecondArg = 0x10000, + + // Special codegen + // the intrinsics need special rules in CodeGen, + // but may be table-driven in the front-end + HW_Flag_SpecialCodeGen = 0x20000, + + // No Read/Modify/Write Semantics + // the intrinsic doesn't have read/modify/write semantics in two/three-operand form. + HW_Flag_NoRMWSemantics = 0x40000, + + // Special import + // the intrinsics need special rules in importer, + // but may be table-driven in the back-end + HW_Flag_SpecialImport = 0x80000, +}; + +struct HWIntrinsicInfo +{ + NamedIntrinsic intrinsicID; + const char* intrinsicName; + InstructionSet isa; + int ival; + unsigned simdSize; + int numArgs; + instruction ins[10]; + HWIntrinsicCategory category; + HWIntrinsicFlag flags; +}; + +#endif // FEATURE_HW_INTRINSICS + +#endif // _HW_INTRINSIC_XARCH_H_ diff --git a/src/jit/lowerarmarch.cpp b/src/jit/lowerarmarch.cpp index b64cb61..90582c8 100644 --- a/src/jit/lowerarmarch.cpp +++ b/src/jit/lowerarmarch.cpp @@ -28,7 +28,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX #include "lsra.h" #ifdef FEATURE_HW_INTRINSICS -#include "hwintrinsicArm64.h" +#include "hwintrinsic.h" #endif //------------------------------------------------------------------------ diff --git a/src/jit/lsraarm64.cpp b/src/jit/lsraarm64.cpp index 004fccf..b4a540b 100644 --- a/src/jit/lsraarm64.cpp +++ b/src/jit/lsraarm64.cpp @@ -1014,7 +1014,7 @@ int LinearScan::BuildSIMD(GenTreeSIMD* simdTree) #endif // FEATURE_SIMD #ifdef FEATURE_HW_INTRINSICS -#include "hwintrinsicArm64.h" +#include "hwintrinsic.h" //------------------------------------------------------------------------ // BuildHWIntrinsic: Set the NodeInfo for a GT_HWIntrinsic tree. // diff --git a/src/jit/namedintrinsiclist.h b/src/jit/namedintrinsiclist.h index d8dfabd..314579c 100644 --- a/src/jit/namedintrinsiclist.h +++ b/src/jit/namedintrinsiclist.h @@ -31,125 +31,4 @@ enum NamedIntrinsic : unsigned int #endif // FEATURE_HW_INTRINSICS }; -#if defined(FEATURE_HW_INTRINSICS) && defined(_TARGET_XARCH_) -enum HWIntrinsicFlag : unsigned int -{ - HW_Flag_NoFlag = 0, - - // Commutative - // - if a binary-op intrinsic is commutative (e.g., Add, Multiply), its op1 can be contained - HW_Flag_Commutative = 0x1, - - // Full range IMM intrinsic - // - the immediate value is valid on the full range of imm8 (0-255) - HW_Flag_FullRangeIMM = 0x2, - - // Generic - // - must throw NotSupportException if the type argument is not numeric type - HW_Flag_OneTypeGeneric = 0x4, - // Two-type Generic - // - the intrinsic has two type parameters - HW_Flag_TwoTypeGeneric = 0x8, - - // NoCodeGen - // - should be transformed in the compiler front-end, cannot reach CodeGen - HW_Flag_NoCodeGen = 0x10, - - // Unfixed SIMD-size - // - overloaded on multiple vector sizes (SIMD size in the table is unreliable) - HW_Flag_UnfixedSIMDSize = 0x20, - - // Complex overload - // - the codegen of overloads cannot be determined by intrinsicID and base type - HW_Flag_ComplexOverloads = 0x40, - - // Multi-instruction - // - that one intrinsic can generate multiple instructions - HW_Flag_MultiIns = 0x80, - - // NoContainment - // the intrinsic cannot be contained - HW_Flag_NoContainment = 0x100, - - // Copy Upper bits - // some SIMD scalar intrinsics need the semantics of copying upper bits from the source operand - HW_Flag_CopyUpperBits = 0x200, - - // Select base type using the first argument type - HW_Flag_BaseTypeFromFirstArg = 0x400, - - // Indicates compFloatingPointUsed does not need to be set. - HW_Flag_NoFloatingPointUsed = 0x800, - - // Maybe IMM - // the intrinsic has either imm or Vector overloads - HW_Flag_MaybeIMM = 0x1000, - - // NoJmpTable IMM - // the imm intrinsic does not need jumptable fallback when it gets non-const argument - HW_Flag_NoJmpTableIMM = 0x2000, - - // 64-bit intrinsics - // Intrinsics that operate over 64-bit general purpose registers are not supported on 32-bit platform - HW_Flag_64BitOnly = 0x4000, - HW_Flag_SecondArgMaybe64Bit = 0x8000, - - // Select base type using the second argument type - HW_Flag_BaseTypeFromSecondArg = 0x10000, - - // Special codegen - // the intrinsics need special rules in CodeGen, - // but may be table-driven in the front-end - HW_Flag_SpecialCodeGen = 0x20000, - - // No Read/Modify/Write Semantics - // the intrinsic doesn't have read/modify/write semantics in two/three-operand form. - HW_Flag_NoRMWSemantics = 0x40000, - - // Special import - // the intrinsics need special rules in importer, - // but may be table-driven in the back-end - HW_Flag_SpecialImport = 0x80000, -}; - -enum HWIntrinsicCategory : unsigned int -{ - // Simple SIMD intrinsics - // - take Vector128/256 parameters - // - return a Vector128/256 - // - the codegen of overloads can be determined by intrinsicID and base type of returned vector - HW_Category_SimpleSIMD, - - // IsSupported Property - // - each ISA class has an "IsSupported" property - HW_Category_IsSupportedProperty, - - // IMM intrinsics - // - some SIMD intrinsics requires immediate value (i.e. imm8) to generate instruction - HW_Category_IMM, - - // Scalar intrinsics - // - operate over general purpose registers, like crc32, lzcnt, popcnt, etc. - HW_Category_Scalar, - - // SIMD scalar - // - operate over vector registers(XMM), but just compute on the first element - HW_Category_SIMDScalar, - - // Memory access intrinsics - // - e.g., Avx.Load, Avx.Store, Sse.LoadAligned - HW_Category_MemoryLoad, - HW_Category_MemoryStore, - - // Helper intrinsics - // - do not directly correspond to a instruction, such as Avx.SetAllVector256 - HW_Category_Helper, - - // Special intrinsics - // - have to be addressed specially - HW_Category_Special -}; - -#endif // FEATURE_HW_INTRINSICS && defined(_TARGET_XARCH_) - #endif // _NAMEDINTRINSICLIST_H_ -- 2.7.4