From 5d315691c42b57d1858d0f8dc486708bf839cdb3 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 19 Mar 2021 10:47:47 -0700 Subject: [PATCH] [RISCV] Add missing bitcasts to the results of lowerINSERT_SUBVECTOR and lowerEXTRACT_SUBVECTOR when handling mask vectors. Found by adding asserts to LegalizeDAG to catch incorrect result types being returned. Reviewed By: frasercrmck Differential Revision: https://reviews.llvm.org/D98964 --- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 6dfc2d4..3bde515 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -2876,9 +2876,9 @@ SDValue RISCVTargetLowering::lowerINSERT_SUBVECTOR(SDValue Op, SDValue SlideupAmt = DAG.getConstant(OrigIdx, DL, XLenVT); SDValue Slideup = DAG.getNode(RISCVISD::VSLIDEUP_VL, DL, ContainerVT, Vec, SubVec, SlideupAmt, Mask, VL); - if (!VecVT.isFixedLengthVector()) - return Slideup; - return convertFromScalableVector(VecVT, Slideup, DAG, Subtarget); + if (VecVT.isFixedLengthVector()) + Slideup = convertFromScalableVector(VecVT, Slideup, DAG, Subtarget); + return DAG.getBitcast(Op.getValueType(), Slideup); } unsigned SubRegIdx, RemIdx; @@ -3025,8 +3025,9 @@ SDValue RISCVTargetLowering::lowerEXTRACT_SUBVECTOR(SDValue Op, DAG.getNode(RISCVISD::VSLIDEDOWN_VL, DL, ContainerVT, DAG.getUNDEF(ContainerVT), Vec, SlidedownAmt, Mask, VL); // Now we can use a cast-like subvector extract to get the result. - return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVecVT, Slidedown, - DAG.getConstant(0, DL, XLenVT)); + Slidedown = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVecVT, Slidedown, + DAG.getConstant(0, DL, XLenVT)); + return DAG.getBitcast(Op.getValueType(), Slidedown); } unsigned SubRegIdx, RemIdx; -- 2.7.4