From 5d0d06880c3419bd2707a0d8382305f6946eaf5c Mon Sep 17 00:00:00 2001 From: uros Date: Wed, 14 Apr 2010 06:36:53 +0000 Subject: [PATCH] * config/i386/i386.md (*ashlqi3_1_slp): New insn pattern. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@158293 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 18 ++++++++++-------- gcc/config/i386/i386.md | 44 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 99fecd2..bf8aa55 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2010-04-14 Uros Bizjak + + * config/i386/i386.md (*ashlqi3_1_slp): New insn pattern. + 2010-04-13 Jan Hubicka * ipa-inline.c (cgraph_mark_inline_edge): Avoid double accounting @@ -53,11 +57,9 @@ * Makefile.in (c-pch.o, ggc-common.o): Depend on timevar.h. * c-pch.c: Include timevar.h. (c_common_write_pch): Use TV_PCH_SAVE and TV_PCH_CPP_SAVE timers. - (c_common_read_pch): Use TV_PCH_RESTORE and TV_PCH_CPP_RESTORE - timers. + (c_common_read_pch): Use TV_PCH_RESTORE and TV_PCH_CPP_RESTORE timers. * ggc-common.c: Include timevar.h. - (gt_pch_save): Use TV_PCH_PTR_REALLOC and TV_PCH_PTR_SORT - timers. + (gt_pch_save): Use TV_PCH_PTR_REALLOC and TV_PCH_PTR_SORT timers. * timevar.def (TV_PCH_SAVE): Define. (TV_PCH_CPP_SAVE): Define. (TV_PCH_PTR_REALLOC): Define. @@ -141,11 +143,11 @@ * except.c (lang_eh_type_covers): Likewise. 2010-04-13 Andreas Krebbel - Ulrich Weigand - + Ulrich Weigand + * gcc/config/s390/s390.md: Replace TARGET_64BIT with TARGET_ZARCH. * gcc/config/s390/s390.c: Replace UNTIS_PER_WORD with - UNITS_PER_LONG where it is ABI relevant. + UNITS_PER_LONG where it is ABI relevant. (s390_return_addr_rtx): Likewise. (s390_back_chain_rtx): Likewise. (s390_frame_area): Likewise. @@ -176,7 +178,7 @@ (DWARF_CIE_DATA_ALIGNMENT): New macro. (s390_expand_setmem): Remove unused variable src_addr. * gcc/longlong.h: Make smul_ppmm and sdiv_qrnnd inline asms to - deal with 64 bit registers. + deal with 64 bit registers. * gcc/config/s390/s390.h: Define __zarch__ predefined macro. Replace UNITS_PER_WORD with UNITS_PER_LONG where it is ABI relevant. (UNITS_PER_LONG): New macro. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index b879996..35fc0d4 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -9986,6 +9986,50 @@ (const_string "*"))) (set_attr "mode" "QI,SI,SI")]) +(define_insn "*ashlqi3_1_slp" + [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm")) + (ashift:QI (match_dup 0) + (match_operand:QI 1 "nonmemory_operand" "cI"))) + (clobber (reg:CC FLAGS_REG))] + "(optimize_function_for_size_p (cfun) + || !TARGET_PARTIAL_FLAG_REG_STALL + || (operands[1] == const1_rtx + && (TARGET_SHIFT1 + || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))" +{ + switch (get_attr_type (insn)) + { + case TYPE_ALU: + gcc_assert (operands[1] == const1_rtx); + return "add{b}\t%0, %0"; + + default: + if (operands[1] == const1_rtx + && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))) + return "sal{b}\t%0"; + else + return "sal{b}\t{%1, %0|%0, %1}"; + } +} + [(set (attr "type") + (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") + (const_int 0)) + (match_operand 0 "register_operand" "")) + (match_operand 1 "const1_operand" "")) + (const_string "alu") + ] + (const_string "ishift1"))) + (set (attr "length_immediate") + (if_then_else + (ior (eq_attr "type" "alu") + (and (eq_attr "type" "ishift1") + (and (match_operand 1 "const1_operand" "") + (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p (cfun)") + (const_int 0))))) + (const_string "0") + (const_string "*"))) + (set_attr "mode" "QI")]) + ;; Convert lea to the lea pattern to avoid flags dependency. (define_split [(set (match_operand:DI 0 "register_operand" "") -- 2.7.4