From 5bc830cbf26eca543319b0b8723276a69d0822ac Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 24 Aug 2022 12:21:37 -0400 Subject: [PATCH] pan/mdg: Reexpress umul_high packing There are a bunch of subtle details of how 32-bit sources are zero-extended to 64-bit, how their swizzles work, how 64-bit destinations are shrunk to 32-bit, and how those two interact. This fixes the interactions... mostly. Fixes umul_high, all such tests should be passing now. Unblocks idiv lowering that depends on umul_high. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/panfrost/ci/panfrost-t860-fails.txt | 5 ---- src/panfrost/midgard/midgard_emit.c | 42 +++++++++++++++++---------------- 2 files changed, 22 insertions(+), 25 deletions(-) diff --git a/src/panfrost/ci/panfrost-t860-fails.txt b/src/panfrost/ci/panfrost-t860-fails.txt index 03aba70..92eb580 100644 --- a/src/panfrost/ci/panfrost-t860-fails.txt +++ b/src/panfrost/ci/panfrost-t860-fails.txt @@ -46,8 +46,6 @@ dEQP-GLES31.functional.separate_shader.random.79,Fail dEQP-GLES31.functional.separate_shader.random.80,Fail dEQP-GLES31.functional.separate_shader.random.89,Fail dEQP-GLES31.functional.shaders.builtin_functions.integer.findmsb.ivec2_lowp_compute,Fail -dEQP-GLES31.functional.shaders.builtin_functions.integer.imulextended.ivec3_highp_fragment,Fail -dEQP-GLES31.functional.shaders.builtin_functions.integer.imulextended.ivec3_highp_vertex,Fail dEQP-GLES31.functional.synchronization.in_invocation.image_alias_overwrite,Crash dEQP-GLES31.functional.synchronization.in_invocation.image_atomic_alias_overwrite,Crash dEQP-GLES31.functional.synchronization.in_invocation.image_atomic_alias_write,Crash @@ -75,6 +73,3 @@ dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.base_level.level_1,Fail dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.no_corners.size_pot.clamp_to_edge_repeat,Fail dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.no_corners.size_pot.mirrored_repeat_clamp_to_edge,Fail dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.no_corners.size_pot.repeat_mirrored_repeat,Fail - -dEQP-GLES31.functional.shaders.builtin_functions.integer.imulextended.ivec4_highp_vertex,Fail -dEQP-GLES31.functional.shaders.builtin_functions.integer.umulextended.uvec4_highp_vertex,Fail diff --git a/src/panfrost/midgard/midgard_emit.c b/src/panfrost/midgard/midgard_emit.c index 1d4b117..716e434 100644 --- a/src/panfrost/midgard/midgard_emit.c +++ b/src/panfrost/midgard/midgard_emit.c @@ -176,18 +176,23 @@ vector_to_scalar_alu(midgard_vector_alu v, midgard_instruction *ins) * with rep. Pretty nifty, huh? */ static unsigned -mir_pack_swizzle_64(unsigned *swizzle, unsigned max_component) +mir_pack_swizzle_64(unsigned *swizzle, unsigned max_component, + bool expand_high) { unsigned packed = 0; + unsigned base = expand_high ? 2 : 0; - for (unsigned i = 0; i < 2; ++i) { + for (unsigned i = base; i < base + 2; ++i) { assert(swizzle[i] <= max_component); unsigned a = (swizzle[i] & 1) ? (COMPONENT_W << 2) | COMPONENT_Z : (COMPONENT_Y << 2) | COMPONENT_X; - packed |= a << (i * 4); + if (i & 1) + packed |= a << 4; + else + packed |= a; } return packed; @@ -237,29 +242,26 @@ mir_pack_swizzle(unsigned mask, unsigned *swizzle, assert(sz == 64 || sz == 32); unsigned components = (sz == 32) ? 4 : 2; - packed = mir_pack_swizzle_64(swizzle, components); + packed = mir_pack_swizzle_64(swizzle, components, + mask & 0xc); if (sz == 32) { - bool lo = swizzle[0] >= COMPONENT_Z; - bool hi = swizzle[1] >= COMPONENT_Z; + ASSERTED bool dontcare = true; + bool hi = false; - assert(!(mask & ~0xf)); - assert(!(mask & 0x3) || !(mask & 0xc)); + assert(util_bitcount(mask) <= 2); - if (mask > 3) - mask >>= 2; + u_foreach_bit(i, mask) { + bool hi_i = swizzle[i] >= COMPONENT_Z; - if (mask & 0x1) { - /* We can't mix halves... */ - if (mask & 2) - assert(lo == hi); - - *expand_mode = lo ? midgard_src_expand_high : - midgard_src_expand_low; - } else { - *expand_mode = hi ? midgard_src_expand_high : - midgard_src_expand_low; + /* We can't mix halves */ + assert(dontcare || (hi == hi_i)); + hi = hi_i; + dontcare = false; } + + *expand_mode = hi ? midgard_src_expand_high : + midgard_src_expand_low; } else if (sz < 32) { unreachable("Cannot encode 8/16 swizzle in 64-bit"); } -- 2.7.4