From 5b684a7a7ce175e6e358e3d0d37c88b2d2d15b85 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 29 Sep 2021 15:36:29 +0200 Subject: [PATCH] radv: fix vk_object_base_init/finish for internal buffers Signed-off-by: Samuel Pitoiset Reviewed-by: Jason Ekstrand Part-of: --- src/amd/vulkan/radv_cmd_buffer.c | 8 +++++--- src/amd/vulkan/radv_device.c | 27 ++++++++++++++++++++++----- src/amd/vulkan/radv_meta_buffer.c | 14 ++++++++++---- src/amd/vulkan/radv_meta_clear.c | 5 ++++- src/amd/vulkan/radv_meta_dcc_retile.c | 4 +++- src/amd/vulkan/radv_private.h | 4 ++++ src/amd/vulkan/radv_query.c | 12 +++++++----- 7 files changed, 55 insertions(+), 19 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 3cfc12d..7a6cf7b 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -5183,12 +5183,14 @@ radv_cmd_buffer_begin_subpass(struct radv_cmd_buffer *cmd_buffer, uint32_t subpa /* HTILE buffer */ uint64_t htile_offset = ds_image->offset + ds_image->planes[0].surface.meta_offset; uint64_t htile_size = ds_image->planes[0].surface.meta_slice_size; - struct radv_buffer htile_buffer = {.bo = ds_image->bo, - .offset = htile_offset, - .size = htile_size}; + struct radv_buffer htile_buffer; + + radv_buffer_init(&htile_buffer, cmd_buffer->device, ds_image->bo, htile_size, htile_offset); /* Copy the VRS rates to the HTILE buffer. */ radv_copy_vrs_htile(cmd_buffer, vrs_iview->image, &extent, ds_image, &htile_buffer, true); + + radv_buffer_finish(&htile_buffer); } else { /* When a subpass uses a VRS attachment without binding a depth/stencil attachment, we have * to copy the VRS rates to our internal HTILE buffer. diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 1e95851..3951c7c 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -6182,6 +6182,26 @@ radv_ResetEvent(VkDevice _device, VkEvent _event) return VK_SUCCESS; } +void +radv_buffer_init(struct radv_buffer *buffer, struct radv_device *device, + struct radeon_winsys_bo *bo, uint64_t size, + uint64_t offset) +{ + vk_object_base_init(&device->vk, &buffer->base, VK_OBJECT_TYPE_BUFFER); + + buffer->usage = 0; + buffer->flags = 0; + buffer->bo = bo; + buffer->size = size; + buffer->offset = offset; +} + +void +radv_buffer_finish(struct radv_buffer *buffer) +{ + vk_object_base_finish(&buffer->base); +} + static void radv_destroy_buffer(struct radv_device *device, const VkAllocationCallbacks *pAllocator, struct radv_buffer *buffer) @@ -6189,7 +6209,7 @@ radv_destroy_buffer(struct radv_device *device, const VkAllocationCallbacks *pAl if ((buffer->flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) && buffer->bo) device->ws->buffer_destroy(device->ws, buffer->bo); - vk_object_base_finish(&buffer->base); + radv_buffer_finish(buffer); vk_free2(&device->vk.alloc, pAllocator, buffer); } @@ -6210,12 +6230,9 @@ radv_CreateBuffer(VkDevice _device, const VkBufferCreateInfo *pCreateInfo, if (buffer == NULL) return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY); - vk_object_base_init(&device->vk, &buffer->base, VK_OBJECT_TYPE_BUFFER); + radv_buffer_init(buffer, device, NULL, pCreateInfo->size, 0); - buffer->size = pCreateInfo->size; buffer->usage = pCreateInfo->usage; - buffer->bo = NULL; - buffer->offset = 0; buffer->flags = pCreateInfo->flags; buffer->shareable = diff --git a/src/amd/vulkan/radv_meta_buffer.c b/src/amd/vulkan/radv_meta_buffer.c index b7a1e23..39e805f 100644 --- a/src/amd/vulkan/radv_meta_buffer.c +++ b/src/amd/vulkan/radv_meta_buffer.c @@ -214,12 +214,13 @@ fill_buffer_shader(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo * struct radv_device *device = cmd_buffer->device; uint64_t block_count = round_up_u64(size, 1024); struct radv_meta_saved_state saved_state; + struct radv_buffer dst_buffer; radv_meta_save( &saved_state, cmd_buffer, RADV_META_SAVE_COMPUTE_PIPELINE | RADV_META_SAVE_CONSTANTS | RADV_META_SAVE_DESCRIPTORS); - struct radv_buffer dst_buffer = {.bo = bo, .offset = offset, .size = size}; + radv_buffer_init(&dst_buffer, cmd_buffer->device, bo, size, offset); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, device->meta_state.buffer.fill_pipeline); @@ -244,6 +245,8 @@ fill_buffer_shader(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo * radv_CmdDispatch(radv_cmd_buffer_to_handle(cmd_buffer), block_count, 1, 1); + radv_buffer_finish(&dst_buffer); + radv_meta_restore(&saved_state, cmd_buffer); } @@ -255,13 +258,13 @@ copy_buffer_shader(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo * struct radv_device *device = cmd_buffer->device; uint64_t block_count = round_up_u64(size, 1024); struct radv_meta_saved_state saved_state; + struct radv_buffer src_buffer, dst_buffer; radv_meta_save(&saved_state, cmd_buffer, RADV_META_SAVE_COMPUTE_PIPELINE | RADV_META_SAVE_DESCRIPTORS); - struct radv_buffer dst_buffer = {.bo = dst_bo, .offset = dst_offset, .size = size}; - - struct radv_buffer src_buffer = {.bo = src_bo, .offset = src_offset, .size = size}; + radv_buffer_init(&src_buffer, cmd_buffer->device, src_bo, size, src_offset); + radv_buffer_init(&dst_buffer, cmd_buffer->device, dst_bo, size, dst_offset); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, device->meta_state.buffer.copy_pipeline); @@ -290,6 +293,9 @@ copy_buffer_shader(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo * radv_CmdDispatch(radv_cmd_buffer_to_handle(cmd_buffer), block_count, 1, 1); + radv_buffer_finish(&src_buffer); + radv_buffer_finish(&dst_buffer); + radv_meta_restore(&saved_state, cmd_buffer); } diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index ee8aa99..5e4f4d9 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -826,12 +826,13 @@ clear_htile_mask(struct radv_cmd_buffer *cmd_buffer, const struct radv_image *im struct radv_meta_state *state = &device->meta_state; uint64_t block_count = round_up_u64(size, 1024); struct radv_meta_saved_state saved_state; + struct radv_buffer dst_buffer; radv_meta_save( &saved_state, cmd_buffer, RADV_META_SAVE_COMPUTE_PIPELINE | RADV_META_SAVE_CONSTANTS | RADV_META_SAVE_DESCRIPTORS); - struct radv_buffer dst_buffer = {.bo = bo, .offset = offset, .size = size}; + radv_buffer_init(&dst_buffer, device, bo, size, offset); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, state->clear_htile_mask_pipeline); @@ -859,6 +860,8 @@ clear_htile_mask(struct radv_cmd_buffer *cmd_buffer, const struct radv_image *im radv_CmdDispatch(radv_cmd_buffer_to_handle(cmd_buffer), block_count, 1, 1); + radv_buffer_finish(&dst_buffer); + radv_meta_restore(&saved_state, cmd_buffer); return RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_INV_VCACHE | diff --git a/src/amd/vulkan/radv_meta_dcc_retile.c b/src/amd/vulkan/radv_meta_dcc_retile.c index fb6bbe3..0dc41da 100644 --- a/src/amd/vulkan/radv_meta_dcc_retile.c +++ b/src/amd/vulkan/radv_meta_dcc_retile.c @@ -214,6 +214,7 @@ radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image) { struct radv_meta_saved_state saved_state; struct radv_device *device = cmd_buffer->device; + struct radv_buffer buffer; assert(image->type == VK_IMAGE_TYPE_2D); assert(image->info.array_size == 1 && image->info.levels == 1); @@ -242,7 +243,7 @@ radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image) radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, device->meta_state.dcc_retile.pipeline[swizzle_mode]); - struct radv_buffer buffer = {.size = image->size, .bo = image->bo, .offset = image->offset}; + radv_buffer_init(&buffer, device, image->bo, image->size, image->offset); struct radv_buffer_view views[2]; VkBufferView view_handles[2]; @@ -308,6 +309,7 @@ radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image) radv_buffer_view_finish(views); radv_buffer_view_finish(views + 1); + radv_buffer_finish(&buffer); radv_meta_restore(&saved_state, cmd_buffer); diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 2b24a69..79e7253 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -963,6 +963,10 @@ struct radv_buffer { bool shareable; }; +void radv_buffer_init(struct radv_buffer *buffer, struct radv_device *device, + struct radeon_winsys_bo *bo, uint64_t size, uint64_t offset); +void radv_buffer_finish(struct radv_buffer *buffer); + enum radv_dynamic_state_bits { RADV_DYNAMIC_VIEWPORT = 1ull << 0, RADV_DYNAMIC_SCISSOR = 1ull << 1, diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index f5353e8..971a82c 100644 --- a/src/amd/vulkan/radv_query.c +++ b/src/amd/vulkan/radv_query.c @@ -834,6 +834,7 @@ radv_query_shader(struct radv_cmd_buffer *cmd_buffer, VkPipeline *pipeline, { struct radv_device *device = cmd_buffer->device; struct radv_meta_saved_state saved_state; + struct radv_buffer src_buffer, dst_buffer; bool old_predicating; if (!*pipeline) { @@ -854,13 +855,11 @@ radv_query_shader(struct radv_cmd_buffer *cmd_buffer, VkPipeline *pipeline, old_predicating = cmd_buffer->state.predicating; cmd_buffer->state.predicating = false; + uint64_t src_buffer_size = MAX2(src_stride * count, avail_offset + 4 * count - src_offset); uint64_t dst_buffer_size = count == 1 ? src_stride : dst_stride * count; - struct radv_buffer dst_buffer = {.bo = dst_bo, .offset = dst_offset, .size = dst_buffer_size}; - struct radv_buffer src_buffer = { - .bo = src_bo, - .offset = src_offset, - .size = MAX2(src_stride * count, avail_offset + 4 * count - src_offset)}; + radv_buffer_init(&src_buffer, device, src_bo, src_buffer_size, src_offset); + radv_buffer_init(&dst_buffer, device, dst_bo, dst_buffer_size, dst_offset); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline); @@ -912,6 +911,9 @@ radv_query_shader(struct radv_cmd_buffer *cmd_buffer, VkPipeline *pipeline, /* Restore conditional rendering. */ cmd_buffer->state.predicating = old_predicating; + radv_buffer_finish(&src_buffer); + radv_buffer_finish(&dst_buffer); + radv_meta_restore(&saved_state, cmd_buffer); } -- 2.7.4