From 5a7092ae564ceb7eb13f169bac2f164e564e24e3 Mon Sep 17 00:00:00 2001 From: Evan Quan Date: Fri, 10 Jul 2020 12:21:53 +0800 Subject: [PATCH] drm/amd/powerplay: apply gfxoff disablement/enablement for all SMU11 ASICs Before and after setting gfx clock soft max/min frequency. Signed-off-by: Evan Quan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 6c16fb1..234715a 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -1777,8 +1777,7 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, if (clk_id < 0) return clk_id; - if (clk_type == SMU_GFXCLK && - adev->asic_type == CHIP_SIENNA_CICHLID) + if (clk_type == SMU_GFXCLK) amdgpu_gfx_off_ctrl(adev, false); if (max > 0) { @@ -1798,8 +1797,7 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, } out: - if (clk_type == SMU_GFXCLK && - adev->asic_type == CHIP_SIENNA_CICHLID) + if (clk_type == SMU_GFXCLK) amdgpu_gfx_off_ctrl(adev, true); return ret; -- 2.7.4