From 5a3e2b82af47ce43b7ea975c86d36b6f1226025f Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sun, 27 Oct 2019 17:55:05 +0000 Subject: [PATCH] drm/i915/gt: Tidy up rps irq handler to use intel_gt Since the rps is tied to its intel_gt, use that backpointer to find the right engine rather than delving into i915. Signed-off-by: Chris Wilson Reviewed-by: Andi Shyti Link: https://patchwork.freedesktop.org/patch/msgid/20191027175505.25470-1-chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/gt/intel_rps.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 032a0c6..f6de194 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -1555,11 +1555,9 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir) void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir) { - struct drm_i915_private *i915 = rps_to_i915(rps); + struct intel_gt *gt = rps_to_gt(rps); if (pm_iir & rps->pm_events) { - struct intel_gt *gt = rps_to_gt(rps); - spin_lock(>->irq_lock); gen6_gt_pm_mask_irq(gt, pm_iir & rps->pm_events); rps->pm_iir |= pm_iir & rps->pm_events; @@ -1567,11 +1565,11 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir) spin_unlock(>->irq_lock); } - if (INTEL_GEN(i915) >= 8) + if (INTEL_GEN(gt->i915) >= 8) return; if (pm_iir & PM_VEBOX_USER_INTERRUPT) - intel_engine_breadcrumbs_irq(i915->engine[VECS0]); + intel_engine_breadcrumbs_irq(gt->engine[VECS0]); if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir); -- 2.7.4