From 599ca73e2cdd240dd4e62b223e38254c7bea44dd Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Sun, 7 Oct 2007 09:04:43 +0000 Subject: [PATCH] sim/mips/ * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32. (sc, swxc1): Likewise. Also fix big-endian and reverse-endian shifts for that case. --- sim/mips/ChangeLog | 6 ++++++ sim/mips/mips.igen | 18 +++++++++++------- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 1797b99..d6d9784 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,9 @@ +2007-10-07 Richard Sandiford + + * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32. + (sc, swxc1): Likewise. Also fix big-endian and reverse-endian + shifts for that case. + 2007-09-04 Nick Clifton * interp.c (options enum): Add OPTION_INFO_MEMORY. diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index 0589ac7..fb5d562 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -2263,7 +2263,7 @@ { unsigned64 memval = 0; unsigned64 memval1 = 0; - unsigned64 mask = 0x7; + unsigned64 mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3); unsigned int shift = 2; unsigned int reverse = (ReverseEndian ? (mask >> shift) : 0); unsigned int bigend = (BigEndianCPU ? (mask >> shift) : 0); @@ -3199,10 +3199,12 @@ { unsigned64 memval = 0; unsigned64 memval1 = 0; - unsigned64 mask = 0x7; + unsigned64 mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3); + address_word reverseendian = (ReverseEndian ? (mask ^ AccessLength_WORD) : 0); + address_word bigendiancpu = (BigEndianCPU ? (mask ^ AccessLength_WORD) : 0); unsigned int byte; - paddr = ((paddr & ~mask) | ((paddr & mask) ^ (ReverseEndian << 2))); - byte = ((vaddr & mask) ^ (BigEndianCPU << 2)); + paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian)); + byte = ((vaddr & mask) ^ bigendiancpu); memval = ((unsigned64) GPR[RT] << (8 * byte)); if (LLBIT) { @@ -5552,10 +5554,12 @@ { unsigned64 memval = 0; unsigned64 memval1 = 0; - unsigned64 mask = 0x7; + unsigned64 mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3); + address_word reverseendian = (ReverseEndian ? (mask ^ AccessLength_WORD) : 0); + address_word bigendiancpu = (BigEndianCPU ? (mask ^ AccessLength_WORD) : 0); unsigned int byte; - paddr = ((paddr & ~mask) | ((paddr & mask) ^ (ReverseEndian << 2))); - byte = ((vaddr & mask) ^ (BigEndianCPU << 2)); + paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian)); + byte = ((vaddr & mask) ^ bigendiancpu); memval = (((unsigned64)COP_SW(1,FS)) << (8 * byte)); { StoreMemory(uncached,AccessLength_WORD,memval,memval1,paddr,vaddr,isREAL); -- 2.7.4