From 5909c678831f3a5c1669f6906f777d4ec4532fa1 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 7 Apr 2022 14:35:11 +0100 Subject: [PATCH] [InstCombine] SimplifyDemandedUseBits - add TODO to remove shl node if we only demand known sign bits of the shift source Similar to what we already perform for ashr/lshr --- llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index 735d035..96c59c7 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -563,6 +563,9 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask, DemandedMask, Known)) return R; + // TODO: If we only want bits that already match the signbit then we don't + // need to shift. + uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); -- 2.7.4