From 58cff58c8ea7177676ac869d564697a85e023249 Mon Sep 17 00:00:00 2001 From: "Naveen H.S" Date: Thu, 25 Apr 2013 12:21:13 +0000 Subject: [PATCH] gcc/ 2013-04-25 Naveen H.S * config/aarch64/aarch64.md (*cmp_swp__shft_): New pattern. gcc/testsuite/ 2013-04-25 Naveen H.S * gcc.target/aarch64/cmp.c: New. From-SVN: r198303 --- gcc/ChangeLog | 5 +++ gcc/config/aarch64/aarch64.md | 12 +++++++ gcc/testsuite/ChangeLog | 4 +++ gcc/testsuite/gcc.target/aarch64/cmp.c | 61 ++++++++++++++++++++++++++++++++++ 4 files changed, 82 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/cmp.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e281812..085124c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2013-04-25 Naveen H.S + * config/aarch64/aarch64.md + (*cmp_swp__shft_): New pattern. + +2013-04-25 Naveen H.S + * config/aarch64/aarch64.md (*ngc): New pattern. (*ngcsi_uxtw): New pattern. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 3e10591..2d83054 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -2339,6 +2339,18 @@ (set_attr "mode" "")] ) +(define_insn "*cmp_swp__shft_" + [(set (reg:CC_SWP CC_REGNUM) + (compare:CC_SWP (ashift:GPI + (ANY_EXTEND:GPI + (match_operand:ALLX 0 "register_operand" "r")) + (match_operand:QI 1 "aarch64_shift_imm_" "n")) + (match_operand:GPI 2 "register_operand" "r")))] + "" + "cmp\\t%2, %0, xt %1" + [(set_attr "v8type" "alus_ext") + (set_attr "mode" "")] +) ;; ------------------------------------------------------------------- ;; Store-flag and conditional select insns diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 035ea20..3de1dff 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2013-04-25 Naveen H.S + * gcc.target/aarch64/cmp.c: New. + +2013-04-25 Naveen H.S + * gcc.target/aarch64/ngc.c: New. 2013-04-25 Kyrylo Tkachov diff --git a/gcc/testsuite/gcc.target/aarch64/cmp.c b/gcc/testsuite/gcc.target/aarch64/cmp.c new file mode 100644 index 0000000..ee57dd2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/cmp.c @@ -0,0 +1,61 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +cmp_si_test1 (int a, int b, int c) +{ + if (a > b) + return a + c; + else + return a + b + c; +} + +int +cmp_si_test2 (int a, int b, int c) +{ + if ((a >> 3) > b) + return a + c; + else + return a + b + c; +} + +typedef long long s64; + +s64 +cmp_di_test1 (s64 a, s64 b, s64 c) +{ + if (a > b) + return a + c; + else + return a + b + c; +} + +s64 +cmp_di_test2 (s64 a, s64 b, s64 c) +{ + if ((a >> 3) > b) + return a + c; + else + return a + b + c; +} + +int +cmp_di_test3 (int a, s64 b, s64 c) +{ + if (a > b) + return a + c; + else + return a + b + c; +} + +int +cmp_di_test4 (int a, s64 b, s64 c) +{ + if (((s64)a << 3) > b) + return a + c; + else + return a + b + c; +} + +/* { dg-final { scan-assembler-times "cmp\tw\[0-9\]+, w\[0-9\]+" 2 } } */ +/* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, x\[0-9\]+" 4 } } */ -- 2.7.4