From 57b5f4b2ecc6aeed5328086aa533d706adb008d1 Mon Sep 17 00:00:00 2001 From: Zakk Chen Date: Thu, 4 Nov 2021 10:13:50 -0700 Subject: [PATCH] [RISCV][Clang] Compute the default target-abi if it's empty. Every generated IR has a corresponding target-abi value, so encoding a non-empty value would improve the robustness and correctness. Reviewed By: asb, jrtc27, arichardson Differential Revision: https://reviews.llvm.org/D105555 --- clang/lib/Basic/Targets/RISCV.cpp | 3 +++ clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 22 +++------------------- clang/test/CodeGen/RISCV/riscv-metadata.c | 14 ++++++++++++++ llvm/include/llvm/Support/TargetParser.h | 4 +++- llvm/lib/Support/TargetParser.cpp | 15 +++++++++++++++ 5 files changed, 38 insertions(+), 20 deletions(-) diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp index 93562dd..770d37a 100644 --- a/clang/lib/Basic/Targets/RISCV.cpp +++ b/clang/lib/Basic/Targets/RISCV.cpp @@ -246,6 +246,9 @@ bool RISCVTargetInfo::handleTargetFeatures(std::vector &Features, ISAInfo = std::move(*ParseResult); } + if (ABI.empty()) + ABI = llvm::RISCV::computeDefaultABIFromArch(*ISAInfo).str(); + return true; } diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp index 323f588..7ad8ca6 100644 --- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp +++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp @@ -194,27 +194,11 @@ StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) { auto ParseResult = llvm::RISCVISAInfo::parseArchString( Arch, /* EnableExperimentalExtension */ true); - if (!ParseResult) { + if (!ParseResult) // Ignore parsing error, just go 3rd step. consumeError(ParseResult.takeError()); - } else { - auto &ISAInfo = *ParseResult; - bool HasD = ISAInfo->hasExtension("d"); - unsigned XLen = ISAInfo->getXLen(); - if (XLen == 32) { - bool HasE = ISAInfo->hasExtension("e"); - if (HasD) - return "ilp32d"; - if (HasE) - return "ilp32e"; - return "ilp32"; - } else if (XLen == 64) { - if (HasD) - return "lp64d"; - return "lp64"; - } - llvm_unreachable("unhandled XLen"); - } + else + return llvm::RISCV::computeDefaultABIFromArch(**ParseResult); // 3. Choose a default based on the triple // diff --git a/clang/test/CodeGen/RISCV/riscv-metadata.c b/clang/test/CodeGen/RISCV/riscv-metadata.c index 3e5b2b8..93b836e 100644 --- a/clang/test/CodeGen/RISCV/riscv-metadata.c +++ b/clang/test/CodeGen/RISCV/riscv-metadata.c @@ -1,14 +1,28 @@ +// RUN: %clang_cc1 -triple riscv32 -emit-llvm -o - %s | FileCheck -check-prefix=EMPTY-ILP32 %s +// RUN: %clang_cc1 -triple riscv32 -emit-llvm -target-feature +f -target-feature +d -o - %s | FileCheck -check-prefix=EMPTY-ILP32D %s // RUN: %clang_cc1 -triple riscv32 -target-abi ilp32 -emit-llvm -o - %s | FileCheck -check-prefix=ILP32 %s // RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm -o - %s | FileCheck -check-prefix=ILP32F %s // RUN: %clang_cc1 -triple riscv32 -target-feature +d -target-feature +f -target-abi ilp32d -emit-llvm -o - %s | FileCheck -check-prefix=ILP32D %s +// RUN: %clang_cc1 -triple riscv64 -emit-llvm -o - %s | FileCheck -check-prefix=EMPTY-LP64 %s +// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -emit-llvm -o - %s | FileCheck -check-prefix=EMPTY-LP64D %s // RUN: %clang_cc1 -triple riscv64 -target-abi lp64 -emit-llvm -o - %s | FileCheck -check-prefix=LP64 %s // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm -o - %s | FileCheck -check-prefix=LP64F %s // RUN: %clang_cc1 -triple riscv64 -target-feature +d -target-feature +f -target-abi lp64d -emit-llvm -o - %s | FileCheck -check-prefix=LP64D %s +// Test expected behavior when giving -target-cpu +// This cc1 test is similar to clang with -march=rv32ifd -mcpu=sifive-e31, default abi is ilp32d +// RUN: %clang_cc1 -triple riscv32 -emit-llvm -target-feature +f -target-feature +d -target-cpu sifive-e31 -o - %s | FileCheck -check-prefix=EMPTY-ILP32D %s +// This cc1 test is similar to clang with -march=rv64i -mcpu=sifive-u74, default abi is lp64 +// RUN: %clang_cc1 -triple riscv64 -emit-llvm -o - -target-cpu sifive-u74 %s | FileCheck -check-prefix=EMPTY-LP64 %s + +// EMPTY-ILP32: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32"} +// EMPTY-ILP32D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32d"} // ILP32: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32"} // ILP32F: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32f"} // ILP32D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32d"} +// EMPTY-LP64: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64"} +// EMPTY-LP64D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64d"} // LP64: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64"} // LP64F: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64f"} // LP64D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64d"} diff --git a/llvm/include/llvm/Support/TargetParser.h b/llvm/include/llvm/Support/TargetParser.h index b11467d..01e25a0 100644 --- a/llvm/include/llvm/Support/TargetParser.h +++ b/llvm/include/llvm/Support/TargetParser.h @@ -17,8 +17,9 @@ // FIXME: vector is used because that's what clang uses for subtarget feature // lists, but SmallVector would probably be better #include "llvm/ADT/Triple.h" -#include "llvm/Support/ARMTargetParser.h" #include "llvm/Support/AArch64TargetParser.h" +#include "llvm/Support/ARMTargetParser.h" +#include "llvm/Support/RISCVISAInfo.h" #include namespace llvm { @@ -174,6 +175,7 @@ void fillValidCPUArchList(SmallVectorImpl &Values, bool IsRV64); void fillValidTuneCPUArchList(SmallVectorImpl &Values, bool IsRV64); bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector &Features); StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64); +StringRef computeDefaultABIFromArch(const llvm::RISCVISAInfo &ISAInfo); } // namespace RISCV diff --git a/llvm/lib/Support/TargetParser.cpp b/llvm/lib/Support/TargetParser.cpp index 4acc23d..bc60bdea 100644 --- a/llvm/lib/Support/TargetParser.cpp +++ b/llvm/lib/Support/TargetParser.cpp @@ -331,6 +331,21 @@ bool getCPUFeaturesExceptStdExt(CPUKind Kind, return true; } +StringRef computeDefaultABIFromArch(const llvm::RISCVISAInfo &ISAInfo) { + if (ISAInfo.getXLen() == 32) { + if (ISAInfo.hasExtension("d")) + return "ilp32d"; + if (ISAInfo.hasExtension("e")) + return "ilp32e"; + return "ilp32"; + } else if (ISAInfo.getXLen() == 64) { + if (ISAInfo.hasExtension("d")) + return "lp64d"; + return "lp64"; + } + llvm_unreachable("Invalid XLEN"); +} + } // namespace RISCV } // namespace llvm -- 2.7.4