From 579bc1e72e9e8676d5432d705875cc70d392d3df Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Tue, 1 Aug 2023 12:13:17 -0400 Subject: [PATCH] treewide: Drop some is_ssa if's Via Coccinelle patch: @@ expression x; @@ -if (!x.is_ssa) { -... -} and likewise with x->is_ssa, with invalid hunks manually filtered out. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Faith Ekstrand Part-of: --- src/compiler/nir/nir.c | 11 ----------- src/compiler/nir/nir_from_ssa.c | 3 --- src/compiler/nir/nir_inline_uniforms.c | 6 ------ src/compiler/nir/nir_liveness.c | 3 --- src/compiler/nir/nir_loop_analyze.c | 9 --------- src/compiler/nir/nir_lower_phis_to_scalar.c | 3 --- src/compiler/nir/nir_move_vec_src_uses_to_dest.c | 7 ------- src/compiler/nir/nir_opt_constant_folding.c | 6 ------ src/compiler/nir/nir_opt_copy_prop_vars.c | 20 -------------------- src/compiler/nir/nir_opt_if.c | 2 -- src/compiler/nir/nir_opt_move_discards_to_top.c | 3 --- src/compiler/nir/nir_opt_peephole_select.c | 4 ---- src/compiler/nir/nir_opt_rematerialize_compares.c | 5 ----- src/compiler/nir/nir_opt_undef.c | 6 ------ src/compiler/nir/nir_range_analysis.c | 5 ----- src/compiler/nir/nir_search.c | 5 ----- src/compiler/nir/nir_validate.c | 2 -- src/freedreno/ir3/ir3_nir.h | 3 --- src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c | 12 ------------ src/gallium/auxiliary/nir/nir_to_tgsi.c | 8 -------- src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c | 7 ------- .../drivers/etnaviv/etnaviv_nir_lower_source_mods.c | 3 --- .../drivers/lima/ir/lima_nir_duplicate_intrinsic.c | 3 --- .../drivers/lima/ir/lima_nir_split_load_input.c | 6 ------ src/gallium/drivers/lima/ir/lima_nir_split_loads.c | 6 ------ src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c | 8 -------- src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp | 3 --- src/gallium/drivers/radeonsi/si_nir_optim.c | 3 --- .../brw_nir_lower_non_uniform_resource_intel.c | 9 --------- 29 files changed, 171 deletions(-) diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index 57a37f8..adfe9fb 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -1077,11 +1077,6 @@ add_reg_def_cb(nir_dest *dest, void *state) { nir_instr *instr = state; - if (!dest->is_ssa) { - dest->reg.parent_instr = instr; - list_addtail(&dest->reg.def_link, &dest->reg.reg->defs); - } - return true; } @@ -1182,9 +1177,6 @@ remove_def_cb(nir_dest *dest, void *state) { (void) state; - if (!dest->is_ssa) - list_del(&dest->reg.def_link); - return true; } @@ -1531,9 +1523,6 @@ nir_src_as_const_value(nir_src src) bool nir_src_is_always_uniform(nir_src src) { - if (!src.is_ssa) - return false; - /* Constants are trivially uniform */ if (src.ssa->parent_instr->type == nir_instr_type_load_const) return true; diff --git a/src/compiler/nir/nir_from_ssa.c b/src/compiler/nir/nir_from_ssa.c index e8a2552..54f0bf3 100644 --- a/src/compiler/nir/nir_from_ssa.c +++ b/src/compiler/nir/nir_from_ssa.c @@ -575,9 +575,6 @@ nir_rewrite_uses_to_load_reg(nir_builder *b, nir_ssa_def *old, static bool dest_replace_ssa_with_reg(nir_dest *dest, nir_function_impl *impl) { - if (!dest->is_ssa) - return false; - nir_builder b = nir_builder_create(impl); nir_ssa_def *reg = decl_reg_for_ssa_def(&b, &dest->ssa); diff --git a/src/compiler/nir/nir_inline_uniforms.c b/src/compiler/nir/nir_inline_uniforms.c index 5ef4702..ef1e4a0 100644 --- a/src/compiler/nir/nir_inline_uniforms.c +++ b/src/compiler/nir/nir_inline_uniforms.c @@ -72,9 +72,6 @@ nir_collect_src_uniforms(const nir_src *src, int component, uint32_t *uni_offsets, uint8_t *num_offsets, unsigned max_num_bo, unsigned max_offset) { - if (!src->is_ssa) - return false; - assert(max_num_bo > 0 && max_num_bo <= MAX_NUM_BO); assert(component < src->ssa->num_components); @@ -177,9 +174,6 @@ is_induction_variable(const nir_src *src, int component, nir_loop_info *info, uint32_t *uni_offsets, uint8_t *num_offsets, unsigned max_num_bo, unsigned max_offset) { - if (!src->is_ssa) - return false; - assert(component < src->ssa->num_components); /* Return true for induction variable (ie. i in for loop) */ diff --git a/src/compiler/nir/nir_liveness.c b/src/compiler/nir/nir_liveness.c index 2d53e7c..43f0594 100644 --- a/src/compiler/nir/nir_liveness.c +++ b/src/compiler/nir/nir_liveness.c @@ -71,9 +71,6 @@ set_src_live(nir_src *src, void *void_live) { BITSET_WORD *live = void_live; - if (!src->is_ssa) - return true; - if (nir_src_is_undef(*src)) return true; /* undefined variables are never live */ diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c index d647f36..e191356 100644 --- a/src/compiler/nir/nir_loop_analyze.c +++ b/src/compiler/nir/nir_loop_analyze.c @@ -366,9 +366,6 @@ alu_src_has_identity_swizzle(nir_alu_instr *alu, unsigned src_idx) static bool is_only_uniform_src(nir_src *src) { - if (!src->is_ssa) - return false; - nir_instr *instr = src->ssa->parent_instr; switch (instr->type) { @@ -760,9 +757,6 @@ try_eval_const_alu(nir_const_value *dest, nir_alu_instr *alu, { nir_const_value src[NIR_MAX_VEC_COMPONENTS][NIR_MAX_VEC_COMPONENTS]; - if (!alu->dest.dest.is_ssa) - return false; - /* In the case that any outputs/inputs have unsized types, then we need to * guess the bit-size. In this case, the validator ensures that all * bit-sizes match so we can just take the bit-size from first @@ -777,9 +771,6 @@ try_eval_const_alu(nir_const_value *dest, nir_alu_instr *alu, bit_size = alu->dest.dest.ssa.bit_size; for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - if (!alu->src[i].src.is_ssa) - return false; - if (bit_size == 0 && !nir_alu_type_get_type_size(nir_op_infos[alu->op].input_types[i])) bit_size = alu->src[i].src.ssa->bit_size; diff --git a/src/compiler/nir/nir_lower_phis_to_scalar.c b/src/compiler/nir/nir_lower_phis_to_scalar.c index 122c968..1a2638e 100644 --- a/src/compiler/nir/nir_lower_phis_to_scalar.c +++ b/src/compiler/nir/nir_lower_phis_to_scalar.c @@ -49,9 +49,6 @@ static bool is_phi_src_scalarizable(nir_phi_src *src, struct lower_phis_to_scalar_state *state) { - /* Don't know what to do with non-ssa sources */ - if (!src->src.is_ssa) - return false; nir_instr *src_instr = src->src.ssa->parent_instr; switch (src_instr->type) { diff --git a/src/compiler/nir/nir_move_vec_src_uses_to_dest.c b/src/compiler/nir/nir_move_vec_src_uses_to_dest.c index 0f2099c..d72304b 100644 --- a/src/compiler/nir/nir_move_vec_src_uses_to_dest.c +++ b/src/compiler/nir/nir_move_vec_src_uses_to_dest.c @@ -77,18 +77,11 @@ move_vec_src_uses_to_dest_block(nir_block *block) continue; /* The loop */ } - /* Can't handle non-SSA vec operations */ - if (!vec->dest.dest.is_ssa) - continue; - /* First, mark all of the sources we are going to consider for rewriting * to the destination */ int srcs_remaining = 0; for (unsigned i = 0; i < nir_op_infos[vec->op].num_inputs; i++) { - /* We can't rewrite a source if it's not in SSA form */ - if (!vec->src[i].src.is_ssa) - continue; srcs_remaining |= 1 << i; } diff --git a/src/compiler/nir/nir_opt_constant_folding.c b/src/compiler/nir/nir_opt_constant_folding.c index eb56e5c..24534b7 100644 --- a/src/compiler/nir/nir_opt_constant_folding.c +++ b/src/compiler/nir/nir_opt_constant_folding.c @@ -41,9 +41,6 @@ try_fold_alu(nir_builder *b, nir_alu_instr *alu) { nir_const_value src[NIR_MAX_VEC_COMPONENTS][NIR_MAX_VEC_COMPONENTS]; - if (!alu->dest.dest.is_ssa) - return false; - /* In the case that any outputs/inputs have unsized types, then we need to * guess the bit-size. In this case, the validator ensures that all * bit-sizes match so we can just take the bit-size from first @@ -58,9 +55,6 @@ try_fold_alu(nir_builder *b, nir_alu_instr *alu) bit_size = alu->dest.dest.ssa.bit_size; for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - if (!alu->src[i].src.is_ssa) - return false; - if (bit_size == 0 && !nir_alu_type_get_type_size(nir_op_infos[alu->op].input_types[i])) bit_size = alu->src[i].src.ssa->bit_size; diff --git a/src/compiler/nir/nir_opt_copy_prop_vars.c b/src/compiler/nir/nir_opt_copy_prop_vars.c index 8c237ff..9aa3d36 100644 --- a/src/compiler/nir/nir_opt_copy_prop_vars.c +++ b/src/compiler/nir/nir_opt_copy_prop_vars.c @@ -93,8 +93,6 @@ static void value_set_ssa_components(struct value *value, nir_ssa_def *def, unsigned num_components) { - if (!value->is_ssa) - memset(&value->ssa, 0, sizeof(value->ssa)); value->is_ssa = true; for (unsigned i = 0; i < num_components; i++) { value->ssa.def[i] = def; @@ -484,16 +482,6 @@ lookup_entry_and_kill_aliases_copy_array(struct copy_prop_var_state *state, bool *entry_removed) { util_dynarray_foreach_reverse(copies_array, struct copy_entry, iter) { - if (!iter->src.is_ssa) { - /* If this write aliases the source of some entry, get rid of it */ - nir_deref_compare_result result = - nir_compare_derefs_and_paths(state->mem_ctx, &iter->src.deref, deref); - if (result & nir_derefs_may_alias_bit) { - copy_entry_remove(copies_array, iter, entry); - continue; - } - } - nir_deref_compare_result comp = nir_compare_derefs_and_paths(state->mem_ctx, &iter->dst, deref); @@ -634,8 +622,6 @@ value_set_from_value(struct value *value, const struct value *from, if (from->is_ssa) { /* Clear value if it was being used as non-SSA. */ - if (!value->is_ssa) - memset(&value->ssa, 0, sizeof(value->ssa)); value->is_ssa = true; /* Only overwrite the written components */ for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) { @@ -948,12 +934,6 @@ invalidate_copies_for_cf_node(struct copy_prop_var_state *state, static void print_value(struct value *value, unsigned num_components) { - if (!value->is_ssa) { - printf(" %s ", glsl_get_type_name(value->deref.instr->type)); - nir_print_deref(value->deref.instr, stdout); - return; - } - bool same_ssa = true; for (unsigned i = 0; i < num_components; i++) { if (value->ssa.component[i] != i || diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c index 5a81357..304edea 100644 --- a/src/compiler/nir/nir_opt_if.c +++ b/src/compiler/nir/nir_opt_if.c @@ -157,8 +157,6 @@ opt_peel_loop_initial_if(nir_loop *loop) return false; nir_if *nif = nir_cf_node_as_if(if_node); - if (!nif->condition.is_ssa) - return false; nir_ssa_def *cond = nif->condition.ssa; if (cond->parent_instr->type != nir_instr_type_phi) diff --git a/src/compiler/nir/nir_opt_move_discards_to_top.c b/src/compiler/nir/nir_opt_move_discards_to_top.c index f358855..bb53b7b 100644 --- a/src/compiler/nir/nir_opt_move_discards_to_top.c +++ b/src/compiler/nir/nir_opt_move_discards_to_top.c @@ -54,9 +54,6 @@ nir_texop_implies_derivative(nir_texop op) static bool can_move_src(nir_src *src, void *worklist) { - if (!src->is_ssa) - return false; - nir_instr *instr = src->ssa->parent_instr; if (instr->pass_flags) return true; diff --git a/src/compiler/nir/nir_opt_peephole_select.c b/src/compiler/nir/nir_opt_peephole_select.c index 745f4ac..331f935 100644 --- a/src/compiler/nir/nir_opt_peephole_select.c +++ b/src/compiler/nir/nir_opt_peephole_select.c @@ -212,10 +212,6 @@ block_check_for_allowed_instrs(nir_block *block, unsigned *count, break; } - /* It must be SSA */ - if (!mov->dest.dest.is_ssa) - return false; - if (alu_ok) { /* If the ALU operation is an fsat or a move-like operation, do * not count it. The expectation is that it will eventually be diff --git a/src/compiler/nir/nir_opt_rematerialize_compares.c b/src/compiler/nir/nir_opt_rematerialize_compares.c index dc43a7c..16ae6c0 100644 --- a/src/compiler/nir/nir_opt_rematerialize_compares.c +++ b/src/compiler/nir/nir_opt_rematerialize_compares.c @@ -61,8 +61,6 @@ static bool all_srcs_are_ssa(const nir_alu_instr *instr) { for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { - if (!instr->src[i].src.is_ssa) - return false; } return true; @@ -72,9 +70,6 @@ all_srcs_are_ssa(const nir_alu_instr *instr) static bool all_uses_are_bcsel(const nir_alu_instr *instr) { - if (!instr->dest.dest.is_ssa) - return false; - nir_foreach_use(use, &instr->dest.dest.ssa) { if (use->parent_instr->type != nir_instr_type_alu) return false; diff --git a/src/compiler/nir/nir_opt_undef.c b/src/compiler/nir/nir_opt_undef.c index 6c096b7..50a4f4a 100644 --- a/src/compiler/nir/nir_opt_undef.c +++ b/src/compiler/nir/nir_opt_undef.c @@ -42,9 +42,6 @@ opt_undef_csel(nir_alu_instr *instr) return false; for (int i = 1; i <= 2; i++) { - if (!instr->src[i].src.is_ssa) - continue; - nir_instr *parent = instr->src[i].src.ssa->parent_instr; if (parent->type != nir_instr_type_ssa_undef) continue; @@ -144,9 +141,6 @@ opt_undef_store(nir_intrinsic_instr *intrin) return false; } - if (!intrin->src[arg_index].is_ssa) - return false; - nir_ssa_def *def = intrin->src[arg_index].ssa; unsigned write_mask = nir_intrinsic_write_mask(intrin); diff --git a/src/compiler/nir/nir_range_analysis.c b/src/compiler/nir/nir_range_analysis.c index 908d88b..992bd2d 100644 --- a/src/compiler/nir/nir_range_analysis.c +++ b/src/compiler/nir/nir_range_analysis.c @@ -543,11 +543,6 @@ process_fp_query(struct analysis_state *state, struct analysis_query *aq, uint32 unsigned src = q.src; nir_alu_type use_type = q.use_type; - if (!instr->src[src].src.is_ssa) { - *result = pack_data((struct ssa_result_range){unknown, false, false, false}); - return; - } - if (nir_src_is_const(instr->src[src].src)) { *result = pack_data(analyze_constant(instr, src, use_type)); return; diff --git a/src/compiler/nir/nir_search.c b/src/compiler/nir/nir_search.c index f906aa7..92376ca 100644 --- a/src/compiler/nir/nir_search.c +++ b/src/compiler/nir/nir_search.c @@ -71,9 +71,6 @@ src_is_type(nir_src src, nir_alu_type type) { assert(type != nir_type_invalid); - if (!src.is_ssa) - return false; - if (src.ssa->parent_instr->type == nir_instr_type_alu) { nir_alu_instr *src_alu = nir_instr_as_alu(src.ssa->parent_instr); nir_alu_type output_type = nir_op_infos[src_alu->op].output_type; @@ -821,8 +818,6 @@ nir_algebraic_instr(nir_builder *build, nir_instr *instr, return false; nir_alu_instr *alu = nir_instr_as_alu(instr); - if (!alu->dest.dest.is_ssa) - return false; unsigned bit_size = alu->dest.dest.ssa.bit_size; const unsigned execution_mode = diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c index 56d0399..62e152b 100644 --- a/src/compiler/nir/nir_validate.c +++ b/src/compiler/nir/nir_validate.c @@ -1462,8 +1462,6 @@ static bool validate_src_dominance(nir_src *src, void *_state) { validate_state *state = _state; - if (!src->is_ssa) - return true; if (src->ssa->parent_instr->block == src->parent_instr->block) { validate_assert(state, src->ssa->index < state->impl->ssa_alloc); diff --git a/src/freedreno/ir3/ir3_nir.h b/src/freedreno/ir3/ir3_nir.h index 3214648..2a83155 100644 --- a/src/freedreno/ir3/ir3_nir.h +++ b/src/freedreno/ir3/ir3_nir.h @@ -86,9 +86,6 @@ nir_ssa_def *ir3_nir_try_propagate_bit_shift(nir_builder *b, static inline nir_intrinsic_instr * ir3_bindless_resource(nir_src src) { - if (!src.is_ssa) - return NULL; - if (src.ssa->parent_instr->type != nir_instr_type_intrinsic) return NULL; diff --git a/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c b/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c index a90e285..1763e81 100644 --- a/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c +++ b/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c @@ -45,9 +45,6 @@ coord_offset(nir_ssa_def *ssa) if (alu->op != nir_op_vec2) return -1; - if (!alu->src[0].src.is_ssa) - return -1; - int base_src_offset = coord_offset(alu->src[0].src.ssa); if (base_src_offset < 0) return -1; @@ -56,9 +53,6 @@ coord_offset(nir_ssa_def *ssa) /* NOTE it might be possible to support more than 2D? */ for (int i = 1; i < 2; i++) { - if (!alu->src[i].src.is_ssa) - return -1; - int nth_src_offset = coord_offset(alu->src[i].src.ssa); if (nth_src_offset < 0) return -1; @@ -79,12 +73,6 @@ coord_offset(nir_ssa_def *ssa) if (input->intrinsic != nir_intrinsic_load_interpolated_input) return -1; - /* limit to load_barycentric_pixel, other interpolation modes don't seem - * to be supported: - */ - if (!input->src[0].is_ssa) - return -1; - nir_intrinsic_instr *interp = nir_instr_as_intrinsic(input->src[0].ssa->parent_instr); diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.c b/src/gallium/auxiliary/nir/nir_to_tgsi.c index e095a60..00d7191 100644 --- a/src/gallium/auxiliary/nir/nir_to_tgsi.c +++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c @@ -550,19 +550,11 @@ ntt_allocate_regs_unoptimized(struct ntt_compile *c, nir_function_impl *impl) static const uint32_t ntt_extract_const_src_offset(nir_src *src) { - if (!src->is_ssa) - return 0; - nir_ssa_scalar s = nir_get_ssa_scalar(src->ssa, 0); while (nir_ssa_scalar_is_alu(s)) { nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr); - for (int i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - if (!alu->src[i].src.is_ssa) - return 0; - } - if (alu->op == nir_op_iadd) { for (int i = 0; i < 2; i++) { nir_const_value *v = nir_src_as_const_value(alu->src[i].src); diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c index 2ff7207..814fef6 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c @@ -345,9 +345,6 @@ ra_src(struct etna_compile *c, nir_src *src) static hw_src get_src(struct etna_compile *c, nir_src *src) { - if (!src->is_ssa) - return ra_src(c, src); - nir_instr *instr = src->ssa->parent_instr; if (instr->pass_flags & BYPASS_SRC) { @@ -481,10 +478,6 @@ emit_alu(struct etna_compile *c, nir_alu_instr * alu) unsigned dst_swiz; hw_dst dst = ra_dest(c, &alu->dest.dest, &dst_swiz); - /* compose alu write_mask with RA write mask */ - if (!alu->dest.dest.is_ssa) - dst.write_mask = inst_write_mask_compose(alu->dest.write_mask, dst.write_mask); - switch (alu->op) { case nir_op_fdot2: case nir_op_fdot3: diff --git a/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c b/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c index 0eae2e7..a081567 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c +++ b/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c @@ -56,9 +56,6 @@ nir_lower_to_source_mods_instr(nir_builder *b, nir_instr *instr, nir_alu_instr *alu = nir_instr_as_alu(instr); for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - if (!alu->src[i].src.is_ssa) - continue; - if (alu->src[i].src.ssa->parent_instr->type != nir_instr_type_alu) continue; diff --git a/src/gallium/drivers/lima/ir/lima_nir_duplicate_intrinsic.c b/src/gallium/drivers/lima/ir/lima_nir_duplicate_intrinsic.c index 72fc8ef..90b02bf 100644 --- a/src/gallium/drivers/lima/ir/lima_nir_duplicate_intrinsic.c +++ b/src/gallium/drivers/lima/ir/lima_nir_duplicate_intrinsic.c @@ -122,9 +122,6 @@ lima_nir_duplicate_intrinsic_impl(nir_shader *shader, nir_function_impl *impl, if (itr->instr.pass_flags) continue; - if (!itr->dest.is_ssa) - continue; - lima_nir_duplicate_intrinsic(&builder, itr, op); } } diff --git a/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c b/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c index 497496a..5e38749 100644 --- a/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c +++ b/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c @@ -38,12 +38,6 @@ lima_nir_split_load_input_instr(nir_builder *b, if (alu->op != nir_op_mov) return false; - if (!alu->dest.dest.is_ssa) - return false; - - if (!alu->src[0].src.is_ssa) - return false; - nir_ssa_def *ssa = alu->src[0].src.ssa; if (ssa->parent_instr->type != nir_instr_type_intrinsic) return false; diff --git a/src/gallium/drivers/lima/ir/lima_nir_split_loads.c b/src/gallium/drivers/lima/ir/lima_nir_split_loads.c index 6396e15..a61546d 100644 --- a/src/gallium/drivers/lima/ir/lima_nir_split_loads.c +++ b/src/gallium/drivers/lima/ir/lima_nir_split_loads.c @@ -54,16 +54,10 @@ clone_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin) static bool replace_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin) { - if (!intrin->dest.is_ssa) - return false; - if (intrin->intrinsic != nir_intrinsic_load_input && intrin->intrinsic != nir_intrinsic_load_uniform) return false; - if (!intrin->src[0].is_ssa) - return false; - if (intrin->src[0].ssa->parent_instr->type == nir_instr_type_load_const) return false; diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c b/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c index 88f06f7..9312aef 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c +++ b/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c @@ -178,10 +178,6 @@ finished: static bool is_fs_input(const nir_src *src) { - if (!src->is_ssa) { - return false; - } - const nir_instr *parent = src->ssa[0].parent_instr; if (!parent) { return false; @@ -232,10 +228,6 @@ get_nir_input_info(const nir_alu_src *src, unsigned *input_index, int *input_component) { - if (!src->src.is_ssa) { - return false; - } - // The parent instr should be a nir_intrinsic_load_deref. const nir_instr *parent = src->src.ssa[0].parent_instr; if (!parent || parent->type != nir_instr_type_intrinsic) { diff --git a/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp b/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp index 272dac3..e580928 100644 --- a/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp @@ -925,9 +925,6 @@ TexInstr::set_coord_offsets(nir_src *offset) if (!offset) return true; - if (!offset->is_ssa) - return false; - auto literal = nir_src_as_const_value(*offset); if (!literal) return false; diff --git a/src/gallium/drivers/radeonsi/si_nir_optim.c b/src/gallium/drivers/radeonsi/si_nir_optim.c index 8bec569..eda0cdf 100644 --- a/src/gallium/drivers/radeonsi/si_nir_optim.c +++ b/src/gallium/drivers/radeonsi/si_nir_optim.c @@ -13,9 +13,6 @@ static bool add_src_instr_to_worklist(nir_src *src, void *wl) { - if (!src->is_ssa) - return false; - nir_instr_worklist_push_tail(wl, src->ssa->parent_instr); return true; } diff --git a/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c b/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c index d49e6fb..825a2f3 100644 --- a/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c +++ b/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c @@ -36,9 +36,6 @@ nir_instr_is_resource_intel(nir_instr *instr) static bool add_src_instr(nir_src *src, void *state) { - if (!src->is_ssa) - return true; - struct util_dynarray *inst_array = state; util_dynarray_foreach(inst_array, nir_instr *, instr_ptr) { if (*instr_ptr == src->ssa->parent_instr) @@ -119,9 +116,6 @@ brw_nir_lower_non_uniform_intrinsic(nir_builder *b, b->cursor = nir_before_instr(&intrin->instr); - if (!intrin->src[source].is_ssa) - return false; - util_dynarray_clear(inst_array); nir_intrinsic_instr *old_resource_intel = @@ -156,9 +150,6 @@ brw_nir_lower_non_uniform_tex(nir_builder *b, tex->src[s].src_type != nir_tex_src_sampler_handle) continue; - if (!tex->src[s].src.is_ssa) - continue; - util_dynarray_clear(inst_array); nir_intrinsic_instr *old_resource_intel = -- 2.7.4