From 57306070e0d6dd4ca4800f51a30f1f489c310bcf Mon Sep 17 00:00:00 2001 From: Mikhail Skvortcov Date: Mon, 30 Jan 2017 13:55:53 +0300 Subject: [PATCH] RyuJIT/ARM32: misc tiny updates Commit migrated from https://github.com/dotnet/coreclr/commit/fc105b9273e4790d3bddec19a51003ae3f025929 --- src/coreclr/src/jit/codegenarm.cpp | 4 ++++ src/coreclr/src/jit/lsraarm.cpp | 2 ++ 2 files changed, 6 insertions(+) diff --git a/src/coreclr/src/jit/codegenarm.cpp b/src/coreclr/src/jit/codegenarm.cpp index 472db63..c099761 100644 --- a/src/coreclr/src/jit/codegenarm.cpp +++ b/src/coreclr/src/jit/codegenarm.cpp @@ -375,6 +375,7 @@ void CodeGen::genCodeForTreeNode(GenTreePtr treeNode) case GT_LSH: case GT_RSH: case GT_RSZ: + case GT_ROR: genCodeForShift(treeNode); // genCodeForShift() calls genProduceReg() break; @@ -1198,6 +1199,9 @@ instruction CodeGen::genGetInsForOper(genTreeOps oper, var_types type) case GT_XOR: ins = INS_XOR; break; + case GT_ROR: + ins = INS_ror; + break; default: unreached(); break; diff --git a/src/coreclr/src/jit/lsraarm.cpp b/src/coreclr/src/jit/lsraarm.cpp index 6ed6db6..27f1121 100644 --- a/src/coreclr/src/jit/lsraarm.cpp +++ b/src/coreclr/src/jit/lsraarm.cpp @@ -1051,6 +1051,7 @@ void Lowering::TreeNodeInfoInit(GenTree* tree) default: NYI_ARM("TreeNodeInfoInit default case"); case GT_LCL_FLD: + case GT_LCL_FLD_ADDR: case GT_LCL_VAR: case GT_LCL_VAR_ADDR: { @@ -1059,6 +1060,7 @@ void Lowering::TreeNodeInfoInit(GenTree* tree) NYI_IF(varTypeIsStruct(varDsc), "lowering struct var"); NYI_IF(varTypeIsLong(varDsc), "lowering long var"); } + case GT_PHYSREG: case GT_CLS_VAR_ADDR: case GT_IL_OFFSET: case GT_CNS_INT: -- 2.7.4