From 570d5bff9af537265a3e0935140786e5fdf51de1 Mon Sep 17 00:00:00 2001 From: liuhongt Date: Wed, 16 Mar 2022 15:59:57 +0800 Subject: [PATCH] Don't fold __builtin_ia32_blendvpd w/o sse4.2. __builtin_ia32_blendvpd is defined under sse4.1 and gimple folded to ((v2di) c) < 0 ? b : a where vec_cmpv2di is under sse4.2 w/o which it's veclowered to scalar operations and not combined back in rtl. gcc/ChangeLog: PR target/104946 * config/i386/i386-builtin.def (BDESC): Add CODE_FOR_sse4_1_blendvpd for IX86_BUILTIN_BLENDVPD. * config/i386/i386.cc (ix86_gimple_fold_builtin): Don't fold __builtin_ia32_blendvpd w/o sse4.2 gcc/testsuite/ChangeLog: * gcc.target/i386/sse4_1-blendvpd-1.c: New test. --- gcc/config/i386/i386-builtin.def | 2 +- gcc/config/i386/i386.cc | 8 +++++++- gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c | 11 +++++++++++ 3 files changed, 19 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index ea32755..b410102 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -906,7 +906,7 @@ BDESC (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_ssse3_palignrdi, /* SSE4.1 */ BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendpd, "__builtin_ia32_blendpd", IX86_BUILTIN_BLENDPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT) BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendps, "__builtin_ia32_blendps", IX86_BUILTIN_BLENDPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT) -BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF) +BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendvpd, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF) BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps", IX86_BUILTIN_BLENDVPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF) BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dppd, "__builtin_ia32_dppd", IX86_BUILTIN_DPPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT) BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dpps, "__builtin_ia32_dpps", IX86_BUILTIN_DPPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index d77ad83..5a56196 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -18368,10 +18368,16 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) } break; + case IX86_BUILTIN_BLENDVPD: + /* blendvpd is under sse4.1 but pcmpgtq is under sse4.2, + w/o sse4.2, it's veclowered to scalar operations and + not combined back. */ + if (!TARGET_SSE4_2) + break; + /* FALLTHRU. */ case IX86_BUILTIN_PBLENDVB128: case IX86_BUILTIN_PBLENDVB256: case IX86_BUILTIN_BLENDVPS: - case IX86_BUILTIN_BLENDVPD: case IX86_BUILTIN_BLENDVPS256: case IX86_BUILTIN_BLENDVPD256: gcc_assert (n_args == 3); diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c new file mode 100644 index 0000000..c25d3fb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-msse4.1 -O2 -mno-sse4.2" } */ +/* { dg-final { scan-assembler-times {(?n)blendvpd[ \t]+%xmm[0-9]+} 1 } } */ + +#include + +__m128d +foo (__m128d a, __m128d b, __m128d c) +{ + return _mm_blendv_pd (a, b, c); +} -- 2.7.4