From 563548d8f342ea11160b55cd2868f427108614a7 Mon Sep 17 00:00:00 2001 From: Jessica Paquette Date: Mon, 19 Mar 2018 22:48:40 +0000 Subject: [PATCH] [MachineOutliner] AArch64: Emit CFI instructions when outlining calls When outlining calls, the outliner needs to update CFI to ensure that, say, exception handling works. This commit adds that functionality and adds a test just for call outlining. Call outlining stuff in machine-outliner.mir should be moved into machine-outliner-calls.mir in a later commit. llvm-svn: 327917 --- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 19 ++++++ .../CodeGen/AArch64/machine-outliner-calls.mir | 67 ++++++++++++++++++++++ 2 files changed, 86 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-calls.mir diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index 0164905..585524e 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -5282,6 +5282,25 @@ void AArch64InstrInfo::insertOutlinerEpilogue( .addImm(-16); It = MBB.insert(It, STRXpre); + const TargetSubtargetInfo &STI = MF.getSubtarget(); + const MCRegisterInfo *MRI = STI.getRegisterInfo(); + unsigned DwarfReg = MRI->getDwarfRegNum(AArch64::LR, true); + + // Add a CFI saying the stack was moved 16 B down. + int64_t StackPosEntry = + MF.addFrameInst(MCCFIInstruction::createDefCfaOffset(nullptr, 16)); + BuildMI(MBB, It, DebugLoc(), get(AArch64::CFI_INSTRUCTION)) + .addCFIIndex(StackPosEntry) + .setMIFlags(MachineInstr::FrameSetup); + + // Add a CFI saying that the LR that we want to find is now 16 B higher than + // before. + int64_t LRPosEntry = + MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, DwarfReg, 16)); + BuildMI(MBB, It, DebugLoc(), get(AArch64::CFI_INSTRUCTION)) + .addCFIIndex(LRPosEntry) + .setMIFlags(MachineInstr::FrameSetup); + // Insert a restore before the terminator for the function. MachineInstr *LDRXpost = BuildMI(MF, DebugLoc(), get(AArch64::LDRXpost)) .addReg(AArch64::SP, RegState::Define) diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-calls.mir b/llvm/test/CodeGen/AArch64/machine-outliner-calls.mir new file mode 100644 index 0000000..d47d96e --- /dev/null +++ b/llvm/test/CodeGen/AArch64/machine-outliner-calls.mir @@ -0,0 +1,67 @@ +# RUN: llc -simplify-mir -mtriple=aarch64--- -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s +--- | + define void @baz() #0 { + ret void + } + + define void @bar(i32 %a) #0 { + ret void + } + + attributes #0 = { noredzone } +... +--- + +name: bar +tracksRegLiveness: true +body: | + bb.0: + liveins: $w0, $lr, $w8 + $sp = frame-setup SUBXri $sp, 32, 0 + $fp = frame-setup ADDXri $sp, 16, 0 + + bb.1: + BL @baz, implicit-def dead $lr, implicit $sp + $w17 = ORRWri $wzr, 1 + $w17 = ORRWri $wzr, 1 + $w0 = ORRWri $wzr, 4 + + BL @baz, implicit-def dead $lr, implicit $sp + $w17 = ORRWri $wzr, 1 + $w17 = ORRWri $wzr, 1 + $w0 = ORRWri $wzr, 3 + + BL @baz, implicit-def dead $lr, implicit $sp + $w17 = ORRWri $wzr, 1 + $w17 = ORRWri $wzr, 1 + $w0 = ORRWri $wzr, 2 + + BL @baz, implicit-def dead $lr, implicit $sp + $w17 = ORRWri $wzr, 1 + $w17 = ORRWri $wzr, 1 + $w0 = ORRWri $wzr, 1 + + + bb.2: + $fp, $lr = LDPXi $sp, 2 + RET undef $lr +... +--- +name: baz +tracksRegLiveness: true +body: | + bb.0: + liveins: $w0, $lr, $w8 + RET undef $lr + +# CHECK: name: OUTLINED_FUNCTION_0 +# CHECK-DAG: bb.0: +# CHECK-NEXT: liveins: $lr +# CHECK-DAG: frame-setup CFI_INSTRUCTION def_cfa_offset -16 +# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, 16 +# CHECK-NEXT: early-clobber $sp = STRXpre $lr, $sp, -16 +# CHECK-NEXT: BL @baz, implicit-def dead $lr, implicit $sp +# CHECK-NEXT: $w17 = ORRWri $wzr, 1 +# CHECK-NEXT: $w17 = ORRWri $wzr, 1 +# CHECK-NEXT: early-clobber $sp, $lr = LDRXpost $sp, 16 +# CHECK-NEXT: RET undef $lr -- 2.7.4