From 55f4e3a06b52c3e8b6bfad851e1d4e5243f1e2c0 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 14 May 2014 00:08:58 -0700 Subject: [PATCH] i965/fs: Move some flags that affect code generation to fs_visitor. runtime_check_aads_emit isn't actually used currently, but I believe we should be using it on Gen4-5, so I haven't eliminated it. See https://bugs.freedesktop.org/show_bug.cgi?id=78679 for details. Signed-off-by: Kenneth Graunke Reviewed-by: Chris Forbes --- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- src/mesa/drivers/dri/i965/brw_fs.h | 3 +++ src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 +++- src/mesa/drivers/dri/i965/brw_wm.h | 3 --- src/mesa/drivers/dri/i965/brw_wm_iz.cpp | 6 +++--- 5 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 10a9524..03d734f 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -2863,7 +2863,7 @@ fs_visitor::setup_payload_gen6() /* R58-59: interp W for 32-pixel. */ if (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { - c->source_depth_to_render_target = true; + source_depth_to_render_target = true; } } diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 2811864..435d68c 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -566,6 +566,9 @@ public: uint8_t num_regs; } payload; + bool source_depth_to_render_target; + bool runtime_check_aads_emit; + fs_reg pixel_x; fs_reg pixel_y; fs_reg wpos_w; diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 64cf8ae..646fbf5 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -2793,7 +2793,7 @@ fs_visitor::emit_fb_writes() if (src0_alpha_to_render_target) nr += reg_width; - if (c->source_depth_to_render_target) { + if (source_depth_to_render_target) { if (brw->gen == 6) { /* For outputting oDepth on gen6, SIMD8 writes have to be * used. This would require SIMD8 moves of each half to @@ -2975,6 +2975,8 @@ fs_visitor::fs_visitor(struct brw_context *brw, memset(&this->payload, 0, sizeof(this->payload)); memset(this->outputs, 0, sizeof(this->outputs)); memset(this->output_components, 0, sizeof(this->output_components)); + this->source_depth_to_render_target = false; + this->runtime_check_aads_emit = false; this->first_non_payload_grf = 0; this->max_grf = brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF; diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index b3f383d..5721d6f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -83,9 +83,6 @@ struct brw_wm_prog_key { struct brw_wm_compile { struct brw_wm_prog_key key; struct brw_wm_prog_data prog_data; - - GLuint source_depth_to_render_target:1; - GLuint runtime_check_aads_emit:1; }; /** diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp index f51802b..5f719f6 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp +++ b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp @@ -148,12 +148,12 @@ void fs_visitor::setup_payload_gen4() } if (wm_iz_table[lookup].sd_to_rt || kill_stats_promoted_workaround) - c->source_depth_to_render_target = 1; + source_depth_to_render_target = true; if (wm_iz_table[lookup].ds_present || c->key.line_aa != AA_NEVER) { payload.aa_dest_stencil_reg = reg; - c->runtime_check_aads_emit = (!wm_iz_table[lookup].ds_present && - c->key.line_aa == AA_SOMETIMES); + runtime_check_aads_emit = + !wm_iz_table[lookup].ds_present && c->key.line_aa == AA_SOMETIMES; reg++; } -- 2.7.4