From 55eea6eff96a93e8641abb667c8d1c41d4b28bd1 Mon Sep 17 00:00:00 2001 From: Joe Nash Date: Tue, 31 Jan 2023 12:08:00 -0500 Subject: [PATCH] [AMDGPU][NFC] More precise predicates on GFX9 f16 insts Removes redundant Has16BitInsts and allows for future use of OtherPredicates on V_DIV_FIXUP_F16_gfx9 and V_FMA_F16_gfx9 Reviewed By: foad Differential Revision: https://reviews.llvm.org/D142990 --- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index 848d1ad..e9ddbed 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -308,11 +308,11 @@ let FPDPRounding = 1 in { defm V_FMA_F16 : VOP3Inst <"v_fma_f16", VOP3_Profile, any_fma>; } // End Predicates = [Has16BitInsts, isGFX8Only] - let renamedInGFX9 = 1, Predicates = [Has16BitInsts, isGFX9Plus] in { + let renamedInGFX9 = 1, SubtargetPredicate = isGFX9Plus in { defm V_DIV_FIXUP_F16_gfx9 : VOP3Inst <"v_div_fixup_f16_gfx9", VOP3_Profile, AMDGPUdiv_fixup>; defm V_FMA_F16_gfx9 : VOP3Inst <"v_fma_f16_gfx9", VOP3_Profile, any_fma>; - } // End renamedInGFX9 = 1, Predicates = [Has16BitInsts, isGFX9Plus] + } // End renamedInGFX9 = 1, SubtargetPredicate = isGFX9Plus } // End FPDPRounding = 1 let SubtargetPredicate = Has16BitInsts, isCommutable = 1 in { -- 2.7.4