From 5561ed448b8da44f83d1c1cdb75f1266590372b1 Mon Sep 17 00:00:00 2001
From: Aaron Ballman <aaron@aaronballman.com>
Date: Wed, 25 Feb 2015 13:05:24 +0000
Subject: [PATCH] Silencing a "result of 32-bit shift implicitly converted to
 64 bits (was 64-bit shift intended?)" warning in MSVC; NFC.

llvm-svn: 230489
---
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 567cd2a..4f3a625 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9987,7 +9987,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
                 isa<ConstantSDNode>(UI->getOperand(1)) &&
                 (cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() -
                  cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) %
-                (1 << Bits) == 0) {
+                (1ULL << Bits) == 0) {
               SDNode *OtherAdd = *UI;
               for (SDNode::use_iterator VI = OtherAdd->use_begin(),
                    VE = OtherAdd->use_end(); VI != VE; ++VI) {
-- 
2.7.4