From 55038cd1d36fb98d1e5ba189ced8bc4cbb857be4 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Wed, 26 Jul 2017 20:00:53 +0000 Subject: [PATCH] AMDGPU/GlobalISel: Mark 32-bit G_OR as legal Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D35127 llvm-svn: 309165 --- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 ++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 21 +++++++++++++++++++++ 2 files changed, 23 insertions(+) create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index cc56216..21b2181 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -66,6 +66,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() { setAction({G_LOAD, 1, P1}, Legal); setAction({G_LOAD, 1, P2}, Legal); + setAction({G_OR, S32}, Legal); + setAction({G_SELECT, S32}, Legal); setAction({G_SELECT, 1, S1}, Legal); diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir new file mode 100644 index 0000000..4057e41 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir @@ -0,0 +1,21 @@ +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s + +--- | + define void @test_or() { ret void } +... +--- +name: test_or +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: %vgpr0, %vgpr1 + ; CHECK-LABEL: name: test_or + ; CHECK: %2(s32) = G_OR %0, %1 + + %0(s32) = COPY %vgpr0 + %1(s32) = COPY %vgpr1 + %2(s32) = G_OR %0, %1 +... -- 2.7.4