From 54e2876132ff568d7f46cd6f2b0bf23ce95dbe2e Mon Sep 17 00:00:00 2001 From: David Green Date: Mon, 1 Mar 2021 21:46:09 +0000 Subject: [PATCH] [ARM] Update and add extra WLS testing. NFC --- .../Thumb2/LowOverheadLoops/branch-targets.ll | 164 ++++++++------- .../CodeGen/Thumb2/LowOverheadLoops/while-loops.ll | 220 +++++++++++++++++++++ llvm/test/Transforms/HardwareLoops/scalar-while.ll | 139 ------------- 3 files changed, 300 insertions(+), 223 deletions(-) diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll index 6d60759..624dd4c 100644 --- a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll +++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll @@ -1,24 +1,14 @@ -; RUN: llc -mtriple=thumbv8.1m.main -O0 -mattr=+lob -disable-arm-loloops=false -stop-before=arm-low-overhead-loops %s -o - | FileCheck %s --check-prefix=CHECK-MID -; RUN: llc -mtriple=thumbv8.1m.main -O0 -mattr=+lob -disable-arm-loloops=false -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-END +; RUN: llc -mtriple=thumbv8.1m.main -mattr=+lob -disable-arm-loloops=false -start-after=hardware-loops -stop-before=arm-low-overhead-loops %s -o - | FileCheck %s --check-prefix=CHECK-MID ; Test that the branch targets are correct after isel, even though the loop ; will sometimes be reverted anyway. ; CHECK-MID: name: check_loop_dec_brcond_combine -; CHECK-MID: bb.2.for.body: -; CHECK-MID: renamable $lr = t2LoopDec killed renamable $lr, 1 -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 - -; CHECK-END: .LBB0_1: -; CHECK-END: b .LBB0_3 -; CHECK-END: .LBB0_2: -; CHECK-END: subs.w lr, lr, #1 -; CHECK-END: bne .LBB0_3 -; CHECK-END: b .LBB0_4 -; CHECK-END: .LBB0_3: -; CHECK-END: b .LBB0_2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -41,7 +31,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp ne i32 %count.next, 0 br i1 %cmp, label %for.header, label %for.cond.cleanup @@ -57,11 +47,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_ugt_brcond_combine -; CHECK-MID: bb.2.for.body: -; CHECK-MID: renamable $lr = t2LoopDec killed renamable $lr, 1 -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_ugt_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -84,7 +75,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp ugt i32 %count.next, 0 br i1 %cmp, label %for.header, label %for.cond.cleanup @@ -100,11 +91,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_ult_brcond_combine -; CHECK-MID: bb.2.for.body: -; CHECK-MID: renamable $lr = t2LoopDec killed renamable $lr, 1 -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_ult_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -127,7 +119,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp ult i32 %count.next, 1 br i1 %cmp, label %for.cond.cleanup, label %for.header @@ -143,11 +135,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_ult_xor_brcond_combine -; CHECK-MIO: bb.2.for.body: -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: tB %bb.4, 14 -; CHECk-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_ult_xor_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -170,7 +163,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp ult i32 %count.next, 1 %negate = xor i1 %cmp, 1 br i1 %negate, label %for.header, label %for.cond.cleanup @@ -187,11 +180,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_sgt_brcond_combine -; CHECK-MIO: bb.2.for.body: -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: tB %bb.4, 14 -; CHECk-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_sgt_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -214,7 +208,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp sgt i32 %count.next, 0 br i1 %cmp, label %for.header, label %for.cond.cleanup @@ -230,11 +224,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_sge_brcond_combine -; CHECK-MIO: bb.2.for.body: -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: tB %bb.4, 14 -; CHECk-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_sge_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -257,7 +252,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp sge i32 %count.next, 1 br i1 %cmp, label %for.header, label %for.cond.cleanup @@ -273,11 +268,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_sge_xor_brcond_combine -; CHECK-MIO: bb.2.for.body: -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: tB %bb.4, 14 -; CHECk-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_sge_xor_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -300,7 +296,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp sge i32 %count.next, 1 %negated = xor i1 %cmp, 1 br i1 %negated, label %for.cond.cleanup, label %for.header @@ -317,11 +313,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_uge_brcond_combine -; CHECK-MIO: bb.2.for.body: -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: tB %bb.4, 14 -; CHECk-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_uge_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -344,7 +341,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp uge i32 %count.next, 1 br i1 %cmp, label %for.header, label %for.cond.cleanup @@ -360,11 +357,12 @@ for.cond.cleanup: } ; CHECK-MID: name: check_loop_dec_uge_xor_brcond_combine -; CHECK-MIO: bb.2.for.body: -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.3 -; CHECK-MID: tB %bb.4, 14 -; CHECk-MID: bb.3.for.header: -; CHECK-MID: tB %bb.2 +; CHECK-MID: bb.0.entry: +; CHECK-MID: renamable $lr = t2DoLoopStart killed renamable $r3 +; CHECK-MID: bb.1.for.header: +; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 +; CHECK-MID: tB %bb.2, 14 +; CHECK-MID: bb.2.for.cond.cleanup: define void @check_loop_dec_uge_xor_brcond_combine(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) { entry: %start = call i32 @llvm.start.loop.iterations.i32(i32 %N) @@ -387,7 +385,7 @@ for.body: %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp uge i32 %count.next, 1 %negated = xor i1 %cmp, 1 br i1 %negated, label %for.cond.cleanup, label %for.header @@ -404,11 +402,11 @@ for.cond.cleanup: } ; CHECK-MID: check_negated_xor_wls -; CHECK-MID: t2WhileLoopStart renamable $r2, %bb.3 -; CHECK-MID: tB %bb.1 +; CHECK-MID: t2WhileLoopStart $r2, %bb.3 +; CHECK-MID: tB %bb.1 ; CHECK-MID: bb.1.while.body.preheader: ; CHECK-MID: $lr = t2LoopDec killed renamable $lr, 1 -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.2 +; CHECK-MID: t2LoopEnd renamable $lr, %bb.2, implicit-def dead $cpsr ; CHECk-MID: tB %bb.3 ; CHECK-MID: bb.3.while.end: define void @check_negated_xor_wls(i16* nocapture %a, i16* nocapture readonly %b, i32 %N) { @@ -428,7 +426,7 @@ while.body: %ld.b = load i16, i16* %b.addr.05, align 2 %incdec.ptr1 = getelementptr inbounds i16, i16* %a.addr.06, i32 1 store i16 %ld.b, i16* %a.addr.06, align 2 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp ne i32 %count.next, 0 br i1 %cmp, label %while.body, label %while.end @@ -437,11 +435,11 @@ while.end: } ; CHECK-MID: check_negated_cmp_wls -; CHECK-MID: t2WhileLoopStart renamable $r2, %bb.3 -; CHECK-MID: tB %bb.1 +; CHECK-MID: t2WhileLoopStart $r2, %bb.3 +; CHECK-MID: tB %bb.1 ; CHECK-MID: bb.1.while.body.preheader: ; CHECK-MID: $lr = t2LoopDec killed renamable $lr, 1 -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.2 +; CHECK-MID: t2LoopEnd renamable $lr, %bb.2 ; CHECk-MID: tB %bb.3 ; CHECK-MID: bb.3.while.end: define void @check_negated_cmp_wls(i16* nocapture %a, i16* nocapture readonly %b, i32 %N) { @@ -461,7 +459,7 @@ while.body: %ld.b = load i16, i16* %b.addr.05, align 2 %incdec.ptr1 = getelementptr inbounds i16, i16* %a.addr.06, i32 1 store i16 %ld.b, i16* %a.addr.06, align 2 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp.1 = icmp ne i32 %count.next, 0 br i1 %cmp.1, label %while.body, label %while.end @@ -470,15 +468,13 @@ while.end: } ; CHECK-MID: check_negated_reordered_wls -; CHECK-MID: bb.1.while.body.preheader: -; CHECK-MID: tB %bb.2 -; CHECK-MID: bb.2.while.body: -; CHECK-MID: t2LoopDec killed renamable $lr, 1 -; CHECK-MID: t2LoopEnd killed renamable $lr, %bb.2 -; CHECK-MID: tB %bb.4 -; CHECK-MID: bb.3.while: -; CHECK-MID: t2WhileLoopStart {{.*}}, %bb.4 -; CHECK-MID: bb.4.while.end +; CHECK-MID: t2WhileLoopStart killed $r2, %bb.2 +; CHECK-MID: tB %bb.1 +; CHECK-MID: bb.1.while.body: +; CHECK-MID: $lr = t2LoopDec killed renamable $lr, 1 +; CHECK-MID: t2LoopEnd renamable $lr, %bb.1 +; CHECk-MID: tB %bb.2 +; CHECK-MID: bb.2.while.end: define void @check_negated_reordered_wls(i16* nocapture %a, i16* nocapture readonly %b, i32 %N) { entry: br label %while @@ -494,7 +490,7 @@ while.body: %ld.b = load i16, i16* %b.addr.05, align 2 %incdec.ptr1 = getelementptr inbounds i16, i16* %a.addr.06, i32 1 store i16 %ld.b, i16* %a.addr.06, align 2 - %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1) + %count.next = call i32 @llvm.loop.decrement.reg.i32(i32 %count, i32 1) %cmp = icmp ne i32 %count.next, 0 br i1 %cmp, label %while.body, label %while.end @@ -509,4 +505,4 @@ while.end: declare i32 @llvm.start.loop.iterations.i32(i32) declare i1 @llvm.test.set.loop.iterations.i32(i32) -declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) +declare i32 @llvm.loop.decrement.reg.i32(i32, i32) diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll index 9c4fb79..888337c 100644 --- a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll +++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll @@ -1,6 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve --verify-machineinstrs %s -o - | FileCheck %s +; Tail predicated so we use DLSTP define void @simple(i32* nocapture readonly %x, i32* nocapture readnone %y, i32* nocapture %z, i32 %m, i32 %n) { ; CHECK-LABEL: simple: ; CHECK: @ %bb.0: @ %entry @@ -50,6 +51,7 @@ if.end: ; preds = %do.body, %entry ret void } +; Tail predicated so we use DLSTP define void @nested(i32* nocapture readonly %x, i32* nocapture readnone %y, i32* nocapture %z, i32 %m, i32 %n) { ; CHECK-LABEL: nested: ; CHECK: @ %bb.0: @ %entry @@ -148,3 +150,221 @@ if.end: ; preds = %if.end.loopexit, %f declare <4 x i1> @llvm.arm.mve.vctp32(i32) declare i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32>, i32, <4 x i1>) + + +; Long test that was spilling lr between t2LoopDec and End +define dso_local i32 @b(i32* %c, i32 %d, i32 %e) "frame-pointer"="all" { +; CHECK-LABEL: b: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: .save {r4, r5, r6, r7, lr} +; CHECK-NEXT: push {r4, r5, r6, r7, lr} +; CHECK-NEXT: .setfp r7, sp, #12 +; CHECK-NEXT: add r7, sp, #12 +; CHECK-NEXT: .save {r8, r9, r10, r11} +; CHECK-NEXT: push.w {r8, r9, r10, r11} +; CHECK-NEXT: .pad #8 +; CHECK-NEXT: sub sp, #8 +; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill +; CHECK-NEXT: cmp.w r1, #0 +; CHECK-NEXT: beq .LBB2_3 +; CHECK-NEXT: b .LBB2_1 +; CHECK-NEXT: .LBB2_1: @ %while.body.preheader +; CHECK-NEXT: adds r1, r0, #4 +; CHECK-NEXT: mov r3, r2 +; CHECK-NEXT: mvn r2, #1 +; CHECK-NEXT: @ implicit-def: $r9 +; CHECK-NEXT: @ implicit-def: $r10 +; CHECK-NEXT: @ implicit-def: $r6 +; CHECK-NEXT: @ implicit-def: $r8 +; CHECK-NEXT: str r3, [sp] @ 4-byte Spill +; CHECK-NEXT: .LBB2_2: @ %while.body +; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: mov lr, r1 +; CHECK-NEXT: ldr r1, [r1, #-4] +; CHECK-NEXT: mul r1, r1, r9 +; CHECK-NEXT: adds.w r12, r1, #-2147483648 +; CHECK-NEXT: asr.w r5, r1, #31 +; CHECK-NEXT: ldr.w r1, [r10] +; CHECK-NEXT: adc r5, r5, #0 +; CHECK-NEXT: mul r11, r1, r0 +; CHECK-NEXT: adds r0, #4 +; CHECK-NEXT: add.w r3, r11, #-2147483648 +; CHECK-NEXT: asrl r12, r5, r3 +; CHECK-NEXT: smull r4, r3, r1, r12 +; CHECK-NEXT: lsll r4, r3, #30 +; CHECK-NEXT: asrs r5, r3, #31 +; CHECK-NEXT: mov r4, r3 +; CHECK-NEXT: lsll r4, r5, r1 +; CHECK-NEXT: lsll r4, r5, #30 +; CHECK-NEXT: ldrd r4, r11, [r2] +; CHECK-NEXT: asrs r3, r5, #31 +; CHECK-NEXT: mov r12, r5 +; CHECK-NEXT: ldr.w r5, [lr] +; CHECK-NEXT: muls r4, r6, r4 +; CHECK-NEXT: mul r5, r5, r9 +; CHECK-NEXT: add.w r9, r9, #4 +; CHECK-NEXT: adds r4, #2 +; CHECK-NEXT: lsll r12, r3, r4 +; CHECK-NEXT: asr.w r4, r8, #31 +; CHECK-NEXT: adds.w r3, r8, r5 +; CHECK-NEXT: add.w r12, r12, #-2147483648 +; CHECK-NEXT: adc.w r4, r4, r5, asr #31 +; CHECK-NEXT: smull r5, r6, r11, r6 +; CHECK-NEXT: adds.w r3, r3, #-2147483648 +; CHECK-NEXT: adc r3, r4, #0 +; CHECK-NEXT: asrs r4, r3, #31 +; CHECK-NEXT: subs r5, r3, r5 +; CHECK-NEXT: sbcs r4, r6 +; CHECK-NEXT: adds.w r6, r5, #-2147483648 +; CHECK-NEXT: adc r5, r4, #0 +; CHECK-NEXT: asrl r6, r5, r12 +; CHECK-NEXT: lsrl r6, r5, #2 +; CHECK-NEXT: movs r5, #2 +; CHECK-NEXT: str r6, [r5] +; CHECK-NEXT: ldr r5, [r2], #-4 +; CHECK-NEXT: mls r1, r5, r1, r3 +; CHECK-NEXT: adds.w r8, r1, #-2147483648 +; CHECK-NEXT: asr.w r3, r1, #31 +; CHECK-NEXT: adc r1, r3, #0 +; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload +; CHECK-NEXT: lsrl r8, r1, #2 +; CHECK-NEXT: rsb.w r1, r8, #0 +; CHECK-NEXT: str r1, [r10, #-4] +; CHECK-NEXT: add.w r10, r10, #4 +; CHECK-NEXT: str r1, [r3] +; CHECK-NEXT: mov r1, lr +; CHECK-NEXT: add.w r1, lr, #4 +; CHECK-NEXT: ldr.w lr, [sp, #4] @ 4-byte Reload +; CHECK-NEXT: subs.w lr, lr, #1 +; CHECK-NEXT: str.w lr, [sp, #4] @ 4-byte Spill +; CHECK-NEXT: bne .LBB2_2 +; CHECK-NEXT: b .LBB2_3 +; CHECK-NEXT: .LBB2_3: @ %while.end +; CHECK-NEXT: add sp, #8 +; CHECK-NEXT: pop.w {r8, r9, r10, r11} +; CHECK-NEXT: pop {r4, r5, r6, r7, pc} +entry: + %0 = inttoptr i32 %e to i32* + %tobool.not70 = icmp eq i32 %d, 0 + br i1 %tobool.not70, label %while.end, label %while.body + +while.body: ; preds = %entry, %while.body + %p.077 = phi i32* [ %incdec.ptr22, %while.body ], [ inttoptr (i32 2 to i32*), %entry ] + %c.addr.076 = phi i32* [ %incdec.ptr1, %while.body ], [ %c, %entry ] + %n.075 = phi i32* [ %incdec.ptr43, %while.body ], [ undef, %entry ] + %m.074 = phi i32 [ %conv35, %while.body ], [ undef, %entry ] + %d.addr.073 = phi i32 [ %dec, %while.body ], [ %d, %entry ] + %h.072 = phi i32 [ %conv41, %while.body ], [ undef, %entry ] + %incdec.ptr43 = getelementptr inbounds i32, i32* %n.075, i32 1 + %1 = ptrtoint i32* %n.075 to i32 + %2 = load i32, i32* %incdec.ptr43, align 4 + %3 = load i32, i32* %c.addr.076, align 4 + %mul = mul nsw i32 %3, %1 + %conv = sext i32 %mul to i64 + %add = add nsw i64 %conv, 2147483648 + %incdec.ptr1 = getelementptr inbounds i32, i32* %c.addr.076, i32 1 + %4 = ptrtoint i32* %c.addr.076 to i32 + %mul2 = mul nsw i32 %2, %4 + %conv3 = sext i32 %mul2 to i64 + %add4 = add nsw i64 %conv3, 2147483648 + %shr = ashr i64 %add, %add4 + %5 = shl nuw i64 %shr, 32 + %conv6 = ashr exact i64 %5, 32 + %conv7 = sext i32 %2 to i64 + %conv11 = sext i32 %h.072 to i64 + %6 = load i32, i32* %incdec.ptr1, align 4 + %mul12 = mul nsw i32 %6, %1 + %conv13 = sext i32 %mul12 to i64 + %add14 = add nuw nsw i64 %conv11, 2147483648 + %add15 = add nsw i64 %add14, %conv13 + %shr16 = ashr i64 %add15, 32 + %conv17 = trunc i64 %shr16 to i32 + %mul8 = shl nsw i64 %conv7, 30 + %7 = mul i64 %mul8, %conv6 + %conv18 = ashr i64 %7, 32 + %sh_prom = zext i32 %2 to i64 + %shl = shl i64 %conv18, %sh_prom + %conv21 = sext i32 %conv17 to i64 + %incdec.ptr22 = getelementptr inbounds i32, i32* %p.077, i32 -1 + %8 = load i32, i32* %p.077, align 4 + %conv23 = sext i32 %8 to i64 + %conv24 = sext i32 %m.074 to i64 + %mul25 = mul nsw i64 %conv23, %conv24 + %sub = sub nsw i64 2147483648, %mul25 + %add26 = add nsw i64 %sub, %conv21 + %9 = shl i64 %shl, 30 + %conv27 = ashr i64 %9, 32 + %10 = load i32, i32* %incdec.ptr22, align 4 + %mul28 = mul nsw i32 %10, %m.074 + %add29 = add nsw i32 %mul28, 2 + %sh_prom30 = zext i32 %add29 to i64 + %shl31 = shl i64 %conv27, %sh_prom30 + %add32 = add nsw i64 %shl31, 2147483648 + %shr33 = ashr i64 %add26, %add32 + %11 = lshr i64 %shr33, 2 + %conv35 = trunc i64 %11 to i32 + store i32 %conv35, i32* inttoptr (i32 2 to i32*), align 4 + %12 = load i32, i32* %incdec.ptr22, align 4 + %mul36 = mul nsw i32 %12, %2 + %sub37 = sub nsw i32 %conv17, %mul36 + %conv38 = sext i32 %sub37 to i64 + %add39 = add nsw i64 %conv38, 2147483648 + %13 = lshr i64 %add39, 2 + %conv41 = trunc i64 %13 to i32 + %sub42 = sub nsw i32 0, %conv41 + store i32 %sub42, i32* %0, align 4 + store i32 %sub42, i32* %n.075, align 4 + %dec = add nsw i32 %d.addr.073, -1 + %tobool.not = icmp eq i32 %dec, 0 + br i1 %tobool.not, label %while.end, label %while.body + +while.end: ; preds = %while.body, %entry + ret i32 undef +} + +declare void @callee() +define void @callinpreheader(i32* noalias nocapture readonly %pAngle, i32* nocapture %pDst, i32 %size) { +; CHECK-LABEL: callinpreheader: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: .save {r4, r5, r6, lr} +; CHECK-NEXT: push {r4, r5, r6, lr} +; CHECK-NEXT: mov r5, r0 +; CHECK-NEXT: mov r4, r1 +; CHECK-NEXT: movs r0, #0 +; CHECK-NEXT: wls lr, r2, .LBB3_3 +; CHECK-NEXT: @ %bb.1: @ %for.body.ph +; CHECK-NEXT: mov r6, r2 +; CHECK-NEXT: bl callee +; CHECK-NEXT: mov lr, r6 +; CHECK-NEXT: movs r0, #0 +; CHECK-NEXT: .LBB3_2: @ %for.body +; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: ldr r1, [r5], #4 +; CHECK-NEXT: add r0, r1 +; CHECK-NEXT: le lr, .LBB3_2 +; CHECK-NEXT: .LBB3_3: @ %for.cond.cleanup +; CHECK-NEXT: str r0, [r4] +; CHECK-NEXT: pop {r4, r5, r6, pc} +entry: + %cmp7.not = icmp eq i32 %size, 0 + br i1 %cmp7.not, label %for.cond.cleanup, label %for.body.ph + +for.body.ph: + call void @callee() + br label %for.body + +for.body: + %i.09 = phi i32 [ %inc, %for.body ], [ 0, %for.body.ph ] + %s.08 = phi i32 [ %add, %for.body ], [ 0, %for.body.ph ] + %arrayidx = getelementptr inbounds i32, i32* %pAngle, i32 %i.09 + %0 = load i32, i32* %arrayidx, align 4 + %add = add nsw i32 %0, %s.08 + %inc = add nuw nsw i32 %i.09, 1 + %exitcond.not = icmp eq i32 %inc, %size + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body + +for.cond.cleanup: + %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] + store i32 %s.0.lcssa, i32* %pDst, align 4 + ret void +} diff --git a/llvm/test/Transforms/HardwareLoops/scalar-while.ll b/llvm/test/Transforms/HardwareLoops/scalar-while.ll index 0b99f74..91a5774 100644 --- a/llvm/test/Transforms/HardwareLoops/scalar-while.ll +++ b/llvm/test/Transforms/HardwareLoops/scalar-while.ll @@ -100,25 +100,6 @@ define void @while_lt(i32 %i, i32 %N, i32* nocapture %A) { ; CHECK-PHIGUARD: while.end: ; CHECK-PHIGUARD-NEXT: ret void ; -; CHECK-REGDEC-LABEL: @while_lt( -; CHECK-REGDEC-NEXT: entry: -; CHECK-REGDEC-NEXT: [[CMP4:%.*]] = icmp ult i32 [[I:%.*]], [[N:%.*]] -; CHECK-REGDEC-NEXT: br i1 [[CMP4]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*]] -; CHECK-REGDEC: while.body.preheader: -; CHECK-REGDEC-NEXT: [[TMP0:%.*]] = sub i32 [[N]], [[I]] -; CHECK-REGDEC-NEXT: [[TMP1:%.*]] = call i32 @llvm.start.loop.iterations.i32(i32 [[TMP0]]) -; CHECK-REGDEC-NEXT: br label [[WHILE_BODY:%.*]] -; CHECK-REGDEC: while.body: -; CHECK-REGDEC-NEXT: [[I_ADDR_05:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ [[I]], [[WHILE_BODY_PREHEADER]] ] -; CHECK-REGDEC-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP3:%.*]], [[WHILE_BODY]] ] -; CHECK-REGDEC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[I_ADDR_05]] -; CHECK-REGDEC-NEXT: store i32 [[I_ADDR_05]], i32* [[ARRAYIDX]], align 4 -; CHECK-REGDEC-NEXT: [[INC]] = add nuw i32 [[I_ADDR_05]], 1 -; CHECK-REGDEC-NEXT: [[TMP3]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[TMP2]], i32 1) -; CHECK-REGDEC-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 -; CHECK-REGDEC-NEXT: br i1 [[TMP4]], label [[WHILE_BODY]], label [[WHILE_END]] -; CHECK-REGDEC: while.end: -; CHECK-REGDEC-NEXT: ret void entry: %cmp4 = icmp ult i32 %i, %N br i1 %cmp4, label %while.body, label %while.end @@ -230,25 +211,6 @@ define void @while_gt(i32 %i, i32 %N, i32* nocapture %A) { ; CHECK-PHIGUARD: while.end: ; CHECK-PHIGUARD-NEXT: ret void ; -; CHECK-REGDEC-LABEL: @while_gt( -; CHECK-REGDEC-NEXT: entry: -; CHECK-REGDEC-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[I:%.*]], [[N:%.*]] -; CHECK-REGDEC-NEXT: br i1 [[CMP4]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*]] -; CHECK-REGDEC: while.body.preheader: -; CHECK-REGDEC-NEXT: [[TMP0:%.*]] = sub i32 [[I]], [[N]] -; CHECK-REGDEC-NEXT: [[TMP1:%.*]] = call i32 @llvm.start.loop.iterations.i32(i32 [[TMP0]]) -; CHECK-REGDEC-NEXT: br label [[WHILE_BODY:%.*]] -; CHECK-REGDEC: while.body: -; CHECK-REGDEC-NEXT: [[I_ADDR_05:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[I]], [[WHILE_BODY_PREHEADER]] ] -; CHECK-REGDEC-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP3:%.*]], [[WHILE_BODY]] ] -; CHECK-REGDEC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[I_ADDR_05]] -; CHECK-REGDEC-NEXT: store i32 [[I_ADDR_05]], i32* [[ARRAYIDX]], align 4 -; CHECK-REGDEC-NEXT: [[DEC]] = add nsw i32 [[I_ADDR_05]], -1 -; CHECK-REGDEC-NEXT: [[TMP3]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[TMP2]], i32 1) -; CHECK-REGDEC-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 -; CHECK-REGDEC-NEXT: br i1 [[TMP4]], label [[WHILE_BODY]], label [[WHILE_END]] -; CHECK-REGDEC: while.end: -; CHECK-REGDEC-NEXT: ret void entry: %cmp4 = icmp sgt i32 %i, %N br i1 %cmp4, label %while.body, label %while.end @@ -365,26 +327,6 @@ define void @while_gte(i32 %i, i32 %N, i32* nocapture %A) { ; CHECK-PHIGUARD: while.end: ; CHECK-PHIGUARD-NEXT: ret void ; -; CHECK-REGDEC-LABEL: @while_gte( -; CHECK-REGDEC-NEXT: entry: -; CHECK-REGDEC-NEXT: [[CMP4:%.*]] = icmp slt i32 [[I:%.*]], [[N:%.*]] -; CHECK-REGDEC-NEXT: br i1 [[CMP4]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] -; CHECK-REGDEC: while.body.preheader: -; CHECK-REGDEC-NEXT: [[TMP0:%.*]] = add i32 [[I]], 1 -; CHECK-REGDEC-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[N]] -; CHECK-REGDEC-NEXT: [[TMP2:%.*]] = call i32 @llvm.start.loop.iterations.i32(i32 [[TMP1]]) -; CHECK-REGDEC-NEXT: br label [[WHILE_BODY:%.*]] -; CHECK-REGDEC: while.body: -; CHECK-REGDEC-NEXT: [[I_ADDR_05:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[I]], [[WHILE_BODY_PREHEADER]] ] -; CHECK-REGDEC-NEXT: [[TMP3:%.*]] = phi i32 [ [[TMP2]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP4:%.*]], [[WHILE_BODY]] ] -; CHECK-REGDEC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[I_ADDR_05]] -; CHECK-REGDEC-NEXT: store i32 [[I_ADDR_05]], i32* [[ARRAYIDX]], align 4 -; CHECK-REGDEC-NEXT: [[DEC]] = add nsw i32 [[I_ADDR_05]], -1 -; CHECK-REGDEC-NEXT: [[TMP4]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[TMP3]], i32 1) -; CHECK-REGDEC-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0 -; CHECK-REGDEC-NEXT: br i1 [[TMP5]], label [[WHILE_BODY]], label [[WHILE_END]] -; CHECK-REGDEC: while.end: -; CHECK-REGDEC-NEXT: ret void entry: %cmp4 = icmp slt i32 %i, %N br i1 %cmp4, label %while.end, label %while.body @@ -491,24 +433,6 @@ define void @while_ne(i32 %N, i32* nocapture %A) { ; CHECK-PHIGUARD: while.end: ; CHECK-PHIGUARD-NEXT: ret void ; -; CHECK-REGDEC-LABEL: @while_ne( -; CHECK-REGDEC-NEXT: entry: -; CHECK-REGDEC-NEXT: [[CMP:%.*]] = icmp ne i32 [[N:%.*]], 0 -; CHECK-REGDEC-NEXT: br i1 [[CMP]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*]] -; CHECK-REGDEC: while.body.preheader: -; CHECK-REGDEC-NEXT: [[TMP0:%.*]] = call i32 @llvm.start.loop.iterations.i32(i32 [[N]]) -; CHECK-REGDEC-NEXT: br label [[WHILE_BODY:%.*]] -; CHECK-REGDEC: while.body: -; CHECK-REGDEC-NEXT: [[I_ADDR_05:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ] -; CHECK-REGDEC-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP2:%.*]], [[WHILE_BODY]] ] -; CHECK-REGDEC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[I_ADDR_05]] -; CHECK-REGDEC-NEXT: store i32 [[I_ADDR_05]], i32* [[ARRAYIDX]], align 4 -; CHECK-REGDEC-NEXT: [[INC]] = add nuw i32 [[I_ADDR_05]], 1 -; CHECK-REGDEC-NEXT: [[TMP2]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[TMP1]], i32 1) -; CHECK-REGDEC-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 -; CHECK-REGDEC-NEXT: br i1 [[TMP3]], label [[WHILE_BODY]], label [[WHILE_END]] -; CHECK-REGDEC: while.end: -; CHECK-REGDEC-NEXT: ret void entry: %cmp = icmp ne i32 %N, 0 br i1 %cmp, label %while.body, label %while.end @@ -615,24 +539,6 @@ define void @while_eq(i32 %N, i32* nocapture %A) { ; CHECK-PHIGUARD: while.end: ; CHECK-PHIGUARD-NEXT: ret void ; -; CHECK-REGDEC-LABEL: @while_eq( -; CHECK-REGDEC-NEXT: entry: -; CHECK-REGDEC-NEXT: [[CMP:%.*]] = icmp eq i32 [[N:%.*]], 0 -; CHECK-REGDEC-NEXT: br i1 [[CMP]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] -; CHECK-REGDEC: while.body.preheader: -; CHECK-REGDEC-NEXT: [[TMP0:%.*]] = call i32 @llvm.start.loop.iterations.i32(i32 [[N]]) -; CHECK-REGDEC-NEXT: br label [[WHILE_BODY:%.*]] -; CHECK-REGDEC: while.body: -; CHECK-REGDEC-NEXT: [[I_ADDR_05:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ] -; CHECK-REGDEC-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP2:%.*]], [[WHILE_BODY]] ] -; CHECK-REGDEC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[I_ADDR_05]] -; CHECK-REGDEC-NEXT: store i32 [[I_ADDR_05]], i32* [[ARRAYIDX]], align 4 -; CHECK-REGDEC-NEXT: [[INC]] = add nuw i32 [[I_ADDR_05]], 1 -; CHECK-REGDEC-NEXT: [[TMP2]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[TMP1]], i32 1) -; CHECK-REGDEC-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 -; CHECK-REGDEC-NEXT: br i1 [[TMP3]], label [[WHILE_BODY]], label [[WHILE_END]] -; CHECK-REGDEC: while.end: -; CHECK-REGDEC-NEXT: ret void entry: %cmp = icmp eq i32 %N, 0 br i1 %cmp, label %while.end, label %while.body @@ -749,26 +655,6 @@ define void @while_preheader_eq(i32 %N, i32* nocapture %A) { ; CHECK-PHIGUARD: while.end: ; CHECK-PHIGUARD-NEXT: ret void ; -; CHECK-REGDEC-LABEL: @while_preheader_eq( -; CHECK-REGDEC-NEXT: entry: -; CHECK-REGDEC-NEXT: br label [[PREHEADER:%.*]] -; CHECK-REGDEC: preheader: -; CHECK-REGDEC-NEXT: [[CMP:%.*]] = icmp eq i32 [[N:%.*]], 0 -; CHECK-REGDEC-NEXT: br i1 [[CMP]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] -; CHECK-REGDEC: while.body.preheader: -; CHECK-REGDEC-NEXT: [[TMP0:%.*]] = call i32 @llvm.start.loop.iterations.i32(i32 [[N]]) -; CHECK-REGDEC-NEXT: br label [[WHILE_BODY:%.*]] -; CHECK-REGDEC: while.body: -; CHECK-REGDEC-NEXT: [[I_ADDR_05:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ] -; CHECK-REGDEC-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP2:%.*]], [[WHILE_BODY]] ] -; CHECK-REGDEC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[I_ADDR_05]] -; CHECK-REGDEC-NEXT: store i32 [[I_ADDR_05]], i32* [[ARRAYIDX]], align 4 -; CHECK-REGDEC-NEXT: [[INC]] = add nuw i32 [[I_ADDR_05]], 1 -; CHECK-REGDEC-NEXT: [[TMP2]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[TMP1]], i32 1) -; CHECK-REGDEC-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 -; CHECK-REGDEC-NEXT: br i1 [[TMP3]], label [[WHILE_BODY]], label [[WHILE_END]] -; CHECK-REGDEC: while.end: -; CHECK-REGDEC-NEXT: ret void entry: br label %preheader @@ -916,31 +802,6 @@ define void @nested(i32* nocapture %A, i32 %N) { ; CHECK-PHIGUARD: while.end7: ; CHECK-PHIGUARD-NEXT: ret void ; -; CHECK-REGDEC-LABEL: @nested( -; CHECK-REGDEC-NEXT: entry: -; CHECK-REGDEC-NEXT: [[CMP20:%.*]] = icmp eq i32 [[N:%.*]], 0 -; CHECK-REGDEC-NEXT: br i1 [[CMP20]], label [[WHILE_END7:%.*]], label [[WHILE_COND1_PREHEADER_US:%.*]] -; CHECK-REGDEC: while.cond1.preheader.us: -; CHECK-REGDEC-NEXT: [[I_021_US:%.*]] = phi i32 [ [[INC6_US:%.*]], [[WHILE_COND1_WHILE_END_CRIT_EDGE_US:%.*]] ], [ 0, [[ENTRY:%.*]] ] -; CHECK-REGDEC-NEXT: [[MUL_US:%.*]] = mul i32 [[I_021_US]], [[N]] -; CHECK-REGDEC-NEXT: [[TMP0:%.*]] = call i32 @llvm.start.loop.iterations.i32(i32 [[N]]) -; CHECK-REGDEC-NEXT: br label [[WHILE_BODY3_US:%.*]] -; CHECK-REGDEC: while.body3.us: -; CHECK-REGDEC-NEXT: [[J_019_US:%.*]] = phi i32 [ 0, [[WHILE_COND1_PREHEADER_US]] ], [ [[INC_US:%.*]], [[WHILE_BODY3_US]] ] -; CHECK-REGDEC-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[WHILE_COND1_PREHEADER_US]] ], [ [[TMP2:%.*]], [[WHILE_BODY3_US]] ] -; CHECK-REGDEC-NEXT: [[ADD_US:%.*]] = add i32 [[J_019_US]], [[MUL_US]] -; CHECK-REGDEC-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[ADD_US]] -; CHECK-REGDEC-NEXT: store i32 [[ADD_US]], i32* [[ARRAYIDX_US]], align 4 -; CHECK-REGDEC-NEXT: [[INC_US]] = add nuw i32 [[J_019_US]], 1 -; CHECK-REGDEC-NEXT: [[TMP2]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[TMP1]], i32 1) -; CHECK-REGDEC-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 -; CHECK-REGDEC-NEXT: br i1 [[TMP3]], label [[WHILE_BODY3_US]], label [[WHILE_COND1_WHILE_END_CRIT_EDGE_US]] -; CHECK-REGDEC: while.cond1.while.end_crit_edge.us: -; CHECK-REGDEC-NEXT: [[INC6_US]] = add nuw i32 [[I_021_US]], 1 -; CHECK-REGDEC-NEXT: [[EXITCOND23:%.*]] = icmp eq i32 [[INC6_US]], [[N]] -; CHECK-REGDEC-NEXT: br i1 [[EXITCOND23]], label [[WHILE_END7]], label [[WHILE_COND1_PREHEADER_US]] -; CHECK-REGDEC: while.end7: -; CHECK-REGDEC-NEXT: ret void entry: %cmp20 = icmp eq i32 %N, 0 br i1 %cmp20, label %while.end7, label %while.cond1.preheader.us -- 2.7.4