From 549ce8f134bd95a1d4bf1a62215a62f1e9408a96 Mon Sep 17 00:00:00 2001 From: Zubair Lutfullah Kakakhel Date: Fri, 12 Aug 2016 12:48:52 +0100 Subject: [PATCH] misc: pch_phub: Read prefetch value from device tree if passed The default prefetch value for the eg20t device is hard coded to 0x000affaa. Add support for an alternative to be read from DT if available Signed-off-by: Zubair Lutfullah Kakakhel Signed-off-by: Greg Kroah-Hartman --- drivers/misc/pch_phub.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c index 4810e03..1dd18f5 100644 --- a/drivers/misc/pch_phub.c +++ b/drivers/misc/pch_phub.c @@ -28,6 +28,7 @@ #include #include #include +#include #define PHUB_STATUS 0x00 /* Status Register offset */ #define PHUB_CONTROL 0x04 /* Control Register offset */ @@ -711,6 +712,12 @@ static int pch_phub_probe(struct pci_dev *pdev, if (id->driver_data == 1) { /* EG20T PCH */ const char *board_name; + unsigned int prefetch = 0x000affaa; + + if (pdev->dev.of_node) + of_property_read_u32(pdev->dev.of_node, + "intel,eg20t-prefetch", + &prefetch); ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr); @@ -736,7 +743,7 @@ static int pch_phub_probe(struct pci_dev *pdev, CLKCFG_UART_MASK); /* set the prefech value */ - iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); + iowrite32(prefetch, chip->pch_phub_base_address + 0x14); /* set the interrupt delay value */ iowrite32(0x25, chip->pch_phub_base_address + 0x44); chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T; -- 2.7.4