From 53f4826b00f48232aae18804a969b70d2c1255e6 Mon Sep 17 00:00:00 2001
From: Thiemo Seufer <ths@networkno.de>
Date: Thu, 1 Mar 2007 14:29:26 +0000
Subject: [PATCH] 	* mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support
 for mips32 	and mips64.

---
 sim/mips/ChangeLog | 5 +++++
 sim/mips/mips.igen | 8 ++++++++
 2 files changed, 13 insertions(+)

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 9c667ba..35c2ef5 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,8 @@
+2007-03-01  Thiemo Seufer  <ths@mips.com>
+
+	* mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
+	and mips64.
+
 2007-02-20  Thiemo Seufer  <ths@mips.com>
 
 	* dsp.igen: Update copyright notice.
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 9f175eb..73e0cba 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -2531,6 +2531,8 @@
 *vr4100:
 *vr5000:
 *r3900:
+*mips32:
+*mips64:
 {
   do_mfhi (SD_, RD);
 }
@@ -2568,6 +2570,8 @@
 *vr4100:
 *vr5000:
 *r3900:
+*mips32:
+*mips64:
 {
   do_mflo (SD_, RD);
 }
@@ -2717,6 +2721,8 @@
 *vr4100:
 *vr5000:
 *r3900:
+*mips32:
+*mips64:
 {
   check_mt_hilo (SD_, HIHISTORY);
   HI = GPR[RS];
@@ -2746,6 +2752,8 @@
 *vr4100:
 *vr5000:
 *r3900:
+*mips32:
+*mips64:
 {
   check_mt_hilo (SD_, LOHISTORY);
   LO = GPR[RS];
-- 
2.7.4