From 53a08041466c413209c42e69f6e2043e87ade9a7 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 19 Oct 2022 17:10:48 +0300 Subject: [PATCH] radv: tweak lower_shader_calls parameters On Q2RTX shaders : MaxWaves: 62 -> 69 (+11.29%) Instrs: 41626 -> 41575 (-0.12%); split: -0.27%, +0.15% CodeSize: 224960 -> 223740 (-0.54%); split: -0.62%, +0.08% VGPRs: 800 -> 704 (-12.00%) Scratch: 75776 -> 70656 (-6.76%) Latency: 922219 -> 977997 (+6.05%) InvThroughput: 212154 -> 201746 (-4.91%); split: -5.54%, +0.64% VClause: 1120 -> 1155 (+3.12%); split: -1.88%, +5.00% SClause: 1148 -> 1144 (-0.35%); split: -0.70%, +0.35% Copies: 5840 -> 5788 (-0.89%); split: -0.94%, +0.05% PreVGPRs: 753 -> 651 (-13.55%) Signed-off-by: Lionel Landwerlin Reviewed-by: Konstantin Seurer Part-of: --- src/amd/vulkan/radv_pipeline_rt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c index 0cb765e..fd66e85 100644 --- a/src/amd/vulkan/radv_pipeline_rt.c +++ b/src/amd/vulkan/radv_pipeline_rt.c @@ -1623,6 +1623,7 @@ create_rt_shader(struct radv_device *device, const VkRayTracingPipelineCreateInf const nir_lower_shader_calls_options opts = { .address_format = nir_address_format_32bit_offset, .stack_alignment = 16, + .localized_loads = true }; uint32_t num_resume_shaders = 0; nir_shader **resume_shaders = NULL; -- 2.7.4