From 5387522bd00147f298e5799db41db94f9a4a37e3 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marcin=20=C5=9Alusarz?= Date: Thu, 14 Oct 2021 13:22:08 +0200 Subject: [PATCH] iris: fix scratch address patching for TESS_EVAL stage MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Scratch patching code in iris_upload_dirty_render_state (see MERGE_SCRATCH_ADDR calls) assumes that in all shader stages derived_data field stores 3DSTATE_XS packet first. This is not true for TESS_EVAL (DS), so we end up patching 3DSTATE_TE instead of 3DSTATE_DS leading to DWordLength becoming 11 instead of 9 (9 == 3DSTATE_DS.DWordLength, 2 == 3DSTATE_TE.DWordLength, and 9|2 == 11), and hardware hanging on the next instruction. Fix this by reversing the order of packets for TESS_EVAL stage. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5499 Fixes: 4256f7ed584 ("iris: Fill out scratch base address dynamically") Signed-off-by: Marcin Ślusarz Reviewed-by: Kenneth Graunke Part-of: --- src/gallium/drivers/iris/iris_state.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 0726141..d55f924 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -4425,8 +4425,20 @@ iris_store_tes_state(const struct intel_device_info *devinfo, struct brw_vue_prog_data *vue_prog_data = (void *) prog_data; struct brw_tes_prog_data *tes_prog_data = (void *) prog_data; - uint32_t *te_state = (void *) shader->derived_data; - uint32_t *ds_state = te_state + GENX(3DSTATE_TE_length); + uint32_t *ds_state = (void *) shader->derived_data; + uint32_t *te_state = ds_state + GENX(3DSTATE_DS_length); + + iris_pack_command(GENX(3DSTATE_DS), ds_state, ds) { + INIT_THREAD_DISPATCH_FIELDS(ds, Patch, MESA_SHADER_TESS_EVAL); + + ds.DispatchMode = DISPATCH_MODE_SIMD8_SINGLE_PATCH; + ds.MaximumNumberofThreads = devinfo->max_tes_threads - 1; + ds.ComputeWCoordinateEnable = + tes_prog_data->domain == BRW_TESS_DOMAIN_TRI; + + ds.UserClipDistanceCullTestEnableBitmask = + vue_prog_data->cull_distance_mask; + } iris_pack_command(GENX(3DSTATE_TE), te_state, te) { te.Partitioning = tes_prog_data->partitioning; @@ -4446,19 +4458,6 @@ iris_store_tes_state(const struct intel_device_info *devinfo, te.LocalBOPAccumulatorThreshold = 1; #endif } - - iris_pack_command(GENX(3DSTATE_DS), ds_state, ds) { - INIT_THREAD_DISPATCH_FIELDS(ds, Patch, MESA_SHADER_TESS_EVAL); - - ds.DispatchMode = DISPATCH_MODE_SIMD8_SINGLE_PATCH; - ds.MaximumNumberofThreads = devinfo->max_tes_threads - 1; - ds.ComputeWCoordinateEnable = - tes_prog_data->domain == BRW_TESS_DOMAIN_TRI; - - ds.UserClipDistanceCullTestEnableBitmask = - vue_prog_data->cull_distance_mask; - } - } /** -- 2.7.4