From 5303c6fc6ca749758cf3d20fd991135bafbf1e54 Mon Sep 17 00:00:00 2001 From: Chandler Carruth Date: Tue, 9 Dec 2014 11:19:57 +0000 Subject: [PATCH] [x86] Add a test for the CPU names that should have been in r223769. llvm-svn: 223770 --- llvm/test/CodeGen/X86/cpus.ll | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 llvm/test/CodeGen/X86/cpus.ll diff --git a/llvm/test/CodeGen/X86/cpus.ll b/llvm/test/CodeGen/X86/cpus.ll new file mode 100644 index 0000000..a7b4059 --- /dev/null +++ b/llvm/test/CodeGen/X86/cpus.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -o /dev/null -mcpu=prescott +; RUN: llc < %s -o /dev/null -mcpu=nocona +; RUN: llc < %s -o /dev/null -mcpu=core2 +; RUN: llc < %s -o /dev/null -mcpu=penryn +; RUN: llc < %s -o /dev/null -mcpu=nehalem +; RUN: llc < %s -o /dev/null -mcpu=westmere +; RUN: llc < %s -o /dev/null -mcpu=sandybridge +; RUN: llc < %s -o /dev/null -mcpu=ivybridge +; RUN: llc < %s -o /dev/null -mcpu=haswell +; RUN: llc < %s -o /dev/null -mcpu=broadwell +; RUN: llc < %s -o /dev/null -mcpu=bonnell +; RUN: llc < %s -o /dev/null -mcpu=silvermont +; RUN: llc < %s -o /dev/null -mcpu=k8 +; RUN: llc < %s -o /dev/null -mcpu=opteron +; RUN: llc < %s -o /dev/null -mcpu=athlon64 +; RUN: llc < %s -o /dev/null -mcpu=athlon-fx +; RUN: llc < %s -o /dev/null -mcpu=k8-sse3 +; RUN: llc < %s -o /dev/null -mcpu=opteron-sse3 +; RUN: llc < %s -o /dev/null -mcpu=athlon64-sse3 +; RUN: llc < %s -o /dev/null -mcpu=amdfam10 +; RUN: llc < %s -o /dev/null -mcpu=barcelona +; RUN: llc < %s -o /dev/null -mcpu=bdver1 +; RUN: llc < %s -o /dev/null -mcpu=bdver2 +; RUN: llc < %s -o /dev/null -mcpu=bdver3 +; RUN: llc < %s -o /dev/null -mcpu=bdver4 +; RUN: llc < %s -o /dev/null -mcpu=btver1 +; RUN: llc < %s -o /dev/null -mcpu=btver2 +; RUN: llc < %s -o /dev/null -mcpu=winchip-c6 +; RUN: llc < %s -o /dev/null -mcpu=winchip2 +; RUN: llc < %s -o /dev/null -mcpu=c3 +; RUN: llc < %s -o /dev/null -mcpu=c3-2 +; RUN: llc < %s -o /dev/null -mcpu=geode -- 2.7.4